Commit 9dc4241b authored by Helge Deller's avatar Helge Deller
Browse files

Revert "parisc: Mark cr16 CPU clocksource unstable on all SMP machines" 



This reverts commit afdb4a5b.

It triggers RCU stalls at boot with a 32-bit kernel.

Signed-off-by: default avatarHelge Deller <deller@gmx.de>
Noticed-by: default avatarJohn David Anglin <dave.anglin@bell.net>
Cc: stable@vger.kernel.org # v5.16+
parent 30c8e80f

arch/parisc/kernel/time.c

+22 −8
Original line number Diff line number Diff line
@@ -251,16 +251,30 @@ void __init time_init(void) 
static int __init init_cr16_clocksource(void)

{

	/*

	 * The cr16 interval timers are not syncronized across CPUs, even if

	 * they share the same socket.

	 * The cr16 interval timers are not syncronized across CPUs on

	 * different sockets, so mark them unstable and lower rating on

	 * multi-socket SMP systems.

	 */

	if (num_online_cpus() > 1 && !running_on_qemu) {

		int cpu;

		unsigned long cpu0_loc;

		cpu0_loc = per_cpu(cpu_data, 0).cpu_loc;



		for_each_online_cpu(cpu) {

			if (cpu == 0)

				continue;

			if ((cpu0_loc != 0) &&

			    (cpu0_loc == per_cpu(cpu_data, cpu).cpu_loc))

				continue;



			/* mark sched_clock unstable */

			clear_sched_clock_stable();



			clocksource_cr16.name = "cr16_unstable";

			clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;

			clocksource_cr16.rating = 0;

			break;

		}

	}



	/* register at clocksource framework */