Commit 9df1dd45 authored by Fabio Estevam's avatar Fabio Estevam Committed by Greg Kroah-Hartman
Browse files

dt-bindings: serial: imx: Properly describe the i.MX1 interrupts

i.MX1 has three UART interrupts instead of a single one like other
i.MX devices.

Take this into account for properly describing the i.MX1 UART
interrupts.

This fixes the following dt-schema warning:

	from schema $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#yaml#



imx1-ads.dtb: serial@206000: interrupts: [[30], [29], [26]] is too long
Signed-off-by: default avatarFabio Estevam <festevam@denx.de>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231206162841.2326201-1-festevam@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent e045e18d
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+24 −5
Original line number Diff line number Diff line
@@ -9,10 +9,6 @@ title: Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
maintainers:
  - Fabio Estevam <festevam@gmail.com>

allOf:
  - $ref: serial.yaml#
  - $ref: rs485.yaml#

properties:
  compatible:
    oneOf:
@@ -68,7 +64,11 @@ properties:
      - const: tx

  interrupts:
    maxItems: 1
    items:
      - description: UART RX Interrupt
      - description: UART TX Interrupt
      - description: UART RTS Interrupt
    minItems: 1

  wakeup-source: true

@@ -110,6 +110,25 @@ required:
  - clock-names
  - interrupts

allOf:
  - $ref: serial.yaml#
  - $ref: rs485.yaml#

  - if:
      properties:
        compatible:
          contains:
            const: fsl,imx1-uart
    then:
      properties:
        interrupts:
          minItems: 3
          maxItems: 3
    else:
      properties:
        interrupts:
          maxItems: 1

unevaluatedProperties: false

examples: