Loading arch/csky/include/asm/processor.h +0 −2 Original line number Diff line number Diff line Loading @@ -42,7 +42,6 @@ extern struct cpuinfo_csky cpu_data[]; struct thread_struct { unsigned long ksp; /* kernel stack pointer */ unsigned long sr; /* saved status register */ unsigned long trap_no; /* saved status register */ /* FPU regs */ Loading @@ -51,7 +50,6 @@ struct thread_struct { #define INIT_THREAD { \ .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ .sr = DEFAULT_PSR_VALUE, \ } /* Loading arch/csky/kernel/asm-offsets.c +0 −1 Original line number Diff line number Diff line Loading @@ -19,7 +19,6 @@ int main(void) /* offsets into the thread struct */ DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp)); DEFINE(THREAD_SR, offsetof(struct thread_struct, sr)); DEFINE(THREAD_FESR, offsetof(struct thread_struct, user_fp.fesr)); DEFINE(THREAD_FCR, offsetof(struct thread_struct, user_fp.fcr)); DEFINE(THREAD_FPREG, offsetof(struct thread_struct, user_fp.vr)); Loading arch/csky/kernel/entry.S +2 −8 Original line number Diff line number Diff line Loading @@ -330,9 +330,6 @@ ENTRY(__switch_to) lrw a3, TASK_THREAD addu a3, a0 mfcr a2, psr /* Save PSR value */ stw a2, (a3, THREAD_SR) /* Save PSR in task struct */ SAVE_SWITCH_STACK stw sp, (a3, THREAD_KSP) Loading @@ -343,12 +340,9 @@ ENTRY(__switch_to) ldw sp, (a3, THREAD_KSP) /* Set next kernel sp */ ldw a2, (a3, THREAD_SR) /* Set next PSR */ mtcr a2, psr #if defined(__CSKYABIV2__) addi r7, a1, TASK_THREAD_INFO ldw tls, (r7, TINFO_TP_VALUE) addi a3, a1, TASK_THREAD_INFO ldw tls, (a3, TINFO_TP_VALUE) #endif RESTORE_SWITCH_STACK Loading Loading
arch/csky/include/asm/processor.h +0 −2 Original line number Diff line number Diff line Loading @@ -42,7 +42,6 @@ extern struct cpuinfo_csky cpu_data[]; struct thread_struct { unsigned long ksp; /* kernel stack pointer */ unsigned long sr; /* saved status register */ unsigned long trap_no; /* saved status register */ /* FPU regs */ Loading @@ -51,7 +50,6 @@ struct thread_struct { #define INIT_THREAD { \ .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ .sr = DEFAULT_PSR_VALUE, \ } /* Loading
arch/csky/kernel/asm-offsets.c +0 −1 Original line number Diff line number Diff line Loading @@ -19,7 +19,6 @@ int main(void) /* offsets into the thread struct */ DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp)); DEFINE(THREAD_SR, offsetof(struct thread_struct, sr)); DEFINE(THREAD_FESR, offsetof(struct thread_struct, user_fp.fesr)); DEFINE(THREAD_FCR, offsetof(struct thread_struct, user_fp.fcr)); DEFINE(THREAD_FPREG, offsetof(struct thread_struct, user_fp.vr)); Loading
arch/csky/kernel/entry.S +2 −8 Original line number Diff line number Diff line Loading @@ -330,9 +330,6 @@ ENTRY(__switch_to) lrw a3, TASK_THREAD addu a3, a0 mfcr a2, psr /* Save PSR value */ stw a2, (a3, THREAD_SR) /* Save PSR in task struct */ SAVE_SWITCH_STACK stw sp, (a3, THREAD_KSP) Loading @@ -343,12 +340,9 @@ ENTRY(__switch_to) ldw sp, (a3, THREAD_KSP) /* Set next kernel sp */ ldw a2, (a3, THREAD_SR) /* Set next PSR */ mtcr a2, psr #if defined(__CSKYABIV2__) addi r7, a1, TASK_THREAD_INFO ldw tls, (r7, TINFO_TP_VALUE) addi a3, a1, TASK_THREAD_INFO ldw tls, (a3, TINFO_TP_VALUE) #endif RESTORE_SWITCH_STACK Loading