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Align each descriptor/index/context region to 128 bytes before calculating the total DMA pool size. This ensures the memory layout shared with firmware meets the 128-byte alignment requirement. The DMA pool alignment is also set to 128 bytes to match the firmware expectation for all shared structures. Signed-off-by:Kiran K <kiran.k@intel.com> Signed-off-by:
Luiz Augusto von Dentz <luiz.von.dentz@intel.com>