Commit 9e544d46 authored by Siddharth Vadapalli's avatar Siddharth Vadapalli Committed by Vinod Koul
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phy: ti: gmii-sel: Enable USXGMII mode for J7200 



TI's J7200 SoC supports USXGMII mode with the CPSW5G instance's MAC Port1.
Add USXGMII mode to the extra_modes member of J7200's SoC data.

Signed-off-by: default avatarSiddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: default avatarRoger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20241010144845.2555983-1-s-vadapalli@ti.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent bbcc9e2b

drivers/phy/ti/phy-gmii-sel.c

+2 −1
Original line number Diff line number Diff line
@@ -230,7 +230,8 @@ static const 
struct phy_gmii_sel_soc_data phy_gmii_sel_cpsw5g_soc_j7200 = {

	.use_of_data = true,

	.regfields = phy_gmii_sel_fields_am654,

	.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII),

	.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |

		       BIT(PHY_INTERFACE_MODE_USXGMII),

	.num_ports = 4,

	.num_qsgmii_main_ports = 1,

};