Commit 9e8f6bf7 authored by Perry Yuan's avatar Perry Yuan Committed by Borislav Petkov (AMD)
Browse files

x86/process: Clear hardware feedback history for AMD processors 



Incorporate a mechanism within the context switching code to reset the
hardware history for AMD processors. Specifically, when a task is switched in,
the class ID is read and the hardware workload classification history of the
CPU firmware is reset. Then, the workload classification for the next running
thread is begun.

  [ bp: Massage commit message. ]

Signed-off-by: default avatarPerry Yuan <perry.yuan@amd.com>
Co-developed-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Acked-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/20250609200518.3616080-10-superm1@kernel.org
parent 263e66f9

arch/x86/kernel/process_64.c

+4 −0
Original line number Diff line number Diff line
@@ -707,6 +707,10 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) 
	/* Load the Intel cache allocation PQR MSR. */

	resctrl_arch_sched_in(next_p);



	/* Reset hw history on AMD CPUs */

	if (cpu_feature_enabled(X86_FEATURE_AMD_WORKLOAD_CLASS))

		wrmsrl(MSR_AMD_WORKLOAD_HRST, 0x1);



	return prev_p;

}