Commit 9e99b992 authored by Icenowy Zheng's avatar Icenowy Zheng Committed by Drew Fustini
Browse files

clk: thead: th1520-ap: fix parent of padctrl0 clock 



The padctrl0 clock seems to be a child of the perisys_apb4_hclk clock,
gating the later makes padctrl0 registers stuck too.

Fix this relationship.

Fixes: ae81b69f ("clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks")
Signed-off-by: default avatarIcenowy Zheng <uwu@icenowy.me>
Reviewed-by: default avatarDrew Fustini <fustini@kernel.org>
Reviewed-by: default avatarTroy Mitchell <troy.mitchell@linux.dev>
Signed-off-by: default avatarDrew Fustini <fustini@kernel.org>
parent aaa75cbd

drivers/clk/thead/clk-th1520-ap.c

+5 −1
Original line number Diff line number Diff line
@@ -798,13 +798,17 @@ static CCU_GATE(CLK_PERISYS_APB3_HCLK, perisys_apb3_hclk, "perisys-apb3-hclk", p 
		0x150, 11, CLK_IGNORE_UNUSED);

static CCU_GATE(CLK_PERISYS_APB4_HCLK, perisys_apb4_hclk, "perisys-apb4-hclk", perisys_ahb_hclk_pd,

		0x150, 12, 0);

static const struct clk_parent_data perisys_apb4_hclk_pd[] = {

	{ .hw = &perisys_apb4_hclk.gate.hw },

};



static CCU_GATE(CLK_NPU_AXI, npu_axi_clk, "npu-axi", axi_aclk_pd, 0x1c8, 5, 0);

static CCU_GATE(CLK_CPU2VP, cpu2vp_clk, "cpu2vp", axi_aclk_pd, 0x1e0, 13, 0);

static CCU_GATE(CLK_EMMC_SDIO, emmc_sdio_clk, "emmc-sdio", emmc_sdio_ref_clk_pd, 0x204, 30, 0);

static CCU_GATE(CLK_GMAC1, gmac1_clk, "gmac1", gmac_pll_clk_pd, 0x204, 26, 0);

static CCU_GATE(CLK_PADCTRL1, padctrl1_clk, "padctrl1", perisys_apb_pclk_pd, 0x204, 24, 0);

static CCU_GATE(CLK_DSMART, dsmart_clk, "dsmart", perisys_apb_pclk_pd, 0x204, 23, 0);

static CCU_GATE(CLK_PADCTRL0, padctrl0_clk, "padctrl0", perisys_apb_pclk_pd, 0x204, 22, 0);

static CCU_GATE(CLK_PADCTRL0, padctrl0_clk, "padctrl0", perisys_apb4_hclk_pd, 0x204, 22, 0);

static CCU_GATE(CLK_GMAC_AXI, gmac_axi_clk, "gmac-axi", axi4_cpusys2_aclk_pd, 0x204, 21, 0);

static CCU_GATE(CLK_GPIO3, gpio3_clk, "gpio3-clk", peri2sys_apb_pclk_pd, 0x204, 20, 0);

static CCU_GATE(CLK_GMAC0, gmac0_clk, "gmac0", gmac_pll_clk_pd, 0x204, 19, 0);