Commit 9f0178fb authored by Monk Liu's avatar Monk Liu Committed by Alex Deucher
Browse files

drm/amdgpu: disable GFX ring and disable PQ wptr in hw_fini 



otherwise there will be DMAR reading error comes out from CP since
GFX is still alive and CPC's WPTR_POLL is still enabled, which would
lead to DMAR read error.

fix:
we can hault CPG after hw_fini, but cannot halt CPC becaues KIQ
stil need to be alive to let RLCV invoke, but its WPTR_POLL could
be disabled.

Signed-off-by: default avatarMonk Liu <Monk.Liu@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bffe07b8

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+7 −1
Original line number Diff line number Diff line
@@ -2961,7 +2961,13 @@ static int gfx_v9_0_hw_fini(void *handle) 
		gfx_v9_0_kcq_disable(&adev->gfx.kiq.ring, &adev->gfx.compute_ring[i]);



	if (amdgpu_sriov_vf(adev)) {

		pr_debug("For SRIOV client, shouldn't do anything.\n");

		gfx_v9_0_cp_gfx_enable(adev, false);

		/* must disable polling for SRIOV when hw finished, otherwise

		 * CPC engine may still keep fetching WB address which is already

		 * invalid after sw finished and trigger DMAR reading error in

		 * hypervisor side.

		 */

		WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0);

		return 0;

	}

	gfx_v9_0_cp_enable(adev, false);