Unverified Commit 9f23a5d2 authored by Clément Léger's avatar Clément Léger Committed by Palmer Dabbelt
Browse files

riscv: add support for PR_SET_UNALIGN and PR_GET_UNALIGN 



Now that trap support is ready to handle misalignment errors in S-mode,
allow the user to control the behavior of misaligned accesses using
prctl(PR_SET_UNALIGN). Add an align_ctl flag in thread_struct which
will be used to determine if we should SIGBUS the process or not on
such fault.

Signed-off-by: default avatarClément Léger <cleger@rivosinc.com>
Reviewed-by: default avatarBjörn Töpel <bjorn@rivosinc.com>
Link: https://lore.kernel.org/r/20231004151405.521596-9-cleger@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 71c54b3d

arch/riscv/include/asm/processor.h

+9 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 


#include <linux/const.h>

#include <linux/cache.h>

#include <linux/prctl.h>



#include <vdso/processor.h>
@@ -82,6 +83,7 @@ struct thread_struct { 
	unsigned long bad_cause;

	unsigned long vstate_ctrl;

	struct __riscv_v_ext_state vstate;

	unsigned long align_ctl;

};



/* Whitelist the fstate from the task_struct for hardened usercopy */
@@ -94,6 +96,7 @@ static inline void arch_thread_struct_whitelist(unsigned long *offset, 


#define INIT_THREAD {					\

	.sp = sizeof(init_stack) + (long)&init_stack,	\

	.align_ctl = PR_UNALIGN_NOPRINT,		\

}



#define task_pt_regs(tsk)						\
@@ -134,6 +137,12 @@ extern long riscv_v_vstate_ctrl_set_current(unsigned long arg); 
extern long riscv_v_vstate_ctrl_get_current(void);

#endif /* CONFIG_RISCV_ISA_V */



extern int get_unalign_ctl(struct task_struct *tsk, unsigned long addr);

extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val);



#define GET_UNALIGN_CTL(tsk, addr)	get_unalign_ctl((tsk), (addr))

#define SET_UNALIGN_CTL(tsk, val)	set_unalign_ctl((tsk), (val))



#endif /* __ASSEMBLY__ */



#endif /* _ASM_RISCV_PROCESSOR_H */

arch/riscv/kernel/process.c

+18 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 
#include <asm/thread_info.h>

#include <asm/cpuidle.h>

#include <asm/vector.h>

#include <asm/cpufeature.h>



register unsigned long gp_in_global __asm__("gp");
@@ -41,6 +42,23 @@ void arch_cpu_idle(void) 
	cpu_do_idle();

}



int set_unalign_ctl(struct task_struct *tsk, unsigned int val)

{

	if (!unaligned_ctl_available())

		return -EINVAL;



	tsk->thread.align_ctl = val;

	return 0;

}



int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)

{

	if (!unaligned_ctl_available())

		return -EINVAL;



	return put_user(tsk->thread.align_ctl, (unsigned long __user *)adr);

}



void __show_regs(struct pt_regs *regs)

{

	show_regs_print_info(KERN_DEFAULT);

arch/riscv/kernel/traps_misaligned.c

+6 −0
Original line number Diff line number Diff line
@@ -418,6 +418,9 @@ int handle_misaligned_load(struct pt_regs *regs) 
	if (!unaligned_enabled)

		return -1;



	if (user_mode(regs) && (current->thread.align_ctl & PR_UNALIGN_SIGBUS))

		return -1;



	if (get_insn(regs, epc, &insn))

		return -1;
@@ -517,6 +520,9 @@ int handle_misaligned_store(struct pt_regs *regs) 
	if (!unaligned_enabled)

		return -1;



	if (user_mode(regs) && (current->thread.align_ctl & PR_UNALIGN_SIGBUS))

		return -1;



	if (get_insn(regs, epc, &insn))

		return -1;