Commit a04b920f authored by Peter Chiu's avatar Peter Chiu Committed by Felix Fietkau
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wifi: mt76: connac: fix checksum offload fields of connac3 RXD 



Fix incorrect RXD offset and bitfield related to RX checksum offload.

Fixes: 98686cd2 ("wifi: mt76: mt7996: add driver for MediaTek Wi-Fi 7 (802.11be) devices")
Fixes: 4e9011fc ("wifi: mt76: connac: move connac3 definitions in mt76_connac3_mac.h")
Co-developed-by: default avatarShayne Chen <shayne.chen@mediatek.com>
Signed-off-by: default avatarShayne Chen <shayne.chen@mediatek.com>
Signed-off-by: default avatarPeter Chiu <chui-hao.chiu@mediatek.com>
Link: https://patch.msgid.link/20240816095040.2574-1-shayne.chen@mediatek.com


Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent f503ae90

drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.h

+2 −2
Original line number Diff line number Diff line
@@ -28,8 +28,6 @@ enum { 
#define MT_RXD0_MESH			BIT(18)

#define MT_RXD0_MHCP			BIT(19)

#define MT_RXD0_NORMAL_ETH_TYPE_OFS	GENMASK(22, 16)

#define MT_RXD0_NORMAL_IP_SUM		BIT(23)

#define MT_RXD0_NORMAL_UDP_TCP_SUM	BIT(24)



#define MT_RXD0_SW_PKT_TYPE_MASK	GENMASK(31, 16)

#define MT_RXD0_SW_PKT_TYPE_MAP		0x380F
@@ -80,6 +78,8 @@ enum { 
#define MT_RXD3_NORMAL_BEACON_UC	BIT(21)

#define MT_RXD3_NORMAL_CO_ANT		BIT(22)

#define MT_RXD3_NORMAL_FCS_ERR		BIT(24)

#define MT_RXD3_NORMAL_IP_SUM		BIT(26)

#define MT_RXD3_NORMAL_UDP_TCP_SUM	BIT(27)

#define MT_RXD3_NORMAL_VLAN2ETH		BIT(31)



/* RXD DW4 */

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

+2 −3
Original line number Diff line number Diff line
@@ -352,7 +352,7 @@ mt7925_mac_fill_rx_rate(struct mt792x_dev *dev, 
static int

mt7925_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb)

{

	u32 csum_mask = MT_RXD0_NORMAL_IP_SUM | MT_RXD0_NORMAL_UDP_TCP_SUM;

	u32 csum_mask = MT_RXD3_NORMAL_IP_SUM | MT_RXD3_NORMAL_UDP_TCP_SUM;

	struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;

	bool hdr_trans, unicast, insert_ccmp_hdr = false;

	u8 chfreq, qos_ctl = 0, remove_pad, amsdu_info;
@@ -362,7 +362,6 @@ mt7925_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb) 
	struct mt792x_phy *phy = &dev->phy;

	struct ieee80211_supported_band *sband;

	u32 csum_status = *(u32 *)skb->cb;

	u32 rxd0 = le32_to_cpu(rxd[0]);

	u32 rxd1 = le32_to_cpu(rxd[1]);

	u32 rxd2 = le32_to_cpu(rxd[2]);

	u32 rxd3 = le32_to_cpu(rxd[3]);
@@ -420,7 +419,7 @@ mt7925_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb) 
	if (!sband->channels)

		return -EINVAL;



	if (mt76_is_mmio(&dev->mt76) && (rxd0 & csum_mask) == csum_mask &&

	if (mt76_is_mmio(&dev->mt76) && (rxd3 & csum_mask) == csum_mask &&

	    !(csum_status & (BIT(0) | BIT(2) | BIT(3))))

		skb->ip_summed = CHECKSUM_UNNECESSARY;

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

+2 −2
Original line number Diff line number Diff line
@@ -435,7 +435,7 @@ mt7996_mac_fill_rx(struct mt7996_dev *dev, enum mt76_rxq_id q, 
	u32 rxd2 = le32_to_cpu(rxd[2]);

	u32 rxd3 = le32_to_cpu(rxd[3]);

	u32 rxd4 = le32_to_cpu(rxd[4]);

	u32 csum_mask = MT_RXD0_NORMAL_IP_SUM | MT_RXD0_NORMAL_UDP_TCP_SUM;

	u32 csum_mask = MT_RXD3_NORMAL_IP_SUM | MT_RXD3_NORMAL_UDP_TCP_SUM;

	u32 csum_status = *(u32 *)skb->cb;

	u32 mesh_mask = MT_RXD0_MESH | MT_RXD0_MHCP;

	bool is_mesh = (rxd0 & mesh_mask) == mesh_mask;
@@ -497,7 +497,7 @@ mt7996_mac_fill_rx(struct mt7996_dev *dev, enum mt76_rxq_id q, 
	if (!sband->channels)

		return -EINVAL;



	if ((rxd0 & csum_mask) == csum_mask &&

	if ((rxd3 & csum_mask) == csum_mask &&

	    !(csum_status & (BIT(0) | BIT(2) | BIT(3))))

		skb->ip_summed = CHECKSUM_UNNECESSARY;