Commit a08935fc authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: drop MSM_ENC_VBLANK support 



There are no in-kernel users of MSM_ENC_VBLANK wait type. Drop it
together with the corresponding wait_for_vblank callback.

Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/560701/
Link: https://lore.kernel.org/r/20231004031903.518223-1-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent c4ac0c6c

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

+0 −3
Original line number Diff line number Diff line
@@ -2400,9 +2400,6 @@ int dpu_encoder_wait_for_event(struct drm_encoder *drm_enc, 
		case MSM_ENC_TX_COMPLETE:

			fn_wait = phys->ops.wait_for_tx_complete;

			break;

		case MSM_ENC_VBLANK:

			fn_wait = phys->ops.wait_for_vblank;

			break;

		default:

			DPU_ERROR_ENC(dpu_enc, "unknown wait event %d\n",

					event);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

+0 −1
Original line number Diff line number Diff line
@@ -104,7 +104,6 @@ struct dpu_encoder_phys_ops { 
	int (*control_vblank_irq)(struct dpu_encoder_phys *enc, bool enable);

	int (*wait_for_commit_done)(struct dpu_encoder_phys *phys_enc);

	int (*wait_for_tx_complete)(struct dpu_encoder_phys *phys_enc);

	int (*wait_for_vblank)(struct dpu_encoder_phys *phys_enc);

	void (*prepare_for_kickoff)(struct dpu_encoder_phys *phys_enc);

	void (*handle_post_kickoff)(struct dpu_encoder_phys *phys_enc);

	void (*trigger_start)(struct dpu_encoder_phys *phys_enc);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

+0 −28
Original line number Diff line number Diff line
@@ -675,33 +675,6 @@ static int dpu_encoder_phys_cmd_wait_for_commit_done( 
	return _dpu_encoder_phys_cmd_wait_for_ctl_start(phys_enc);

}



static int dpu_encoder_phys_cmd_wait_for_vblank(

		struct dpu_encoder_phys *phys_enc)

{

	int rc = 0;

	struct dpu_encoder_phys_cmd *cmd_enc;

	struct dpu_encoder_wait_info wait_info;



	cmd_enc = to_dpu_encoder_phys_cmd(phys_enc);



	/* only required for master controller */

	if (!dpu_encoder_phys_cmd_is_master(phys_enc))

		return rc;



	wait_info.wq = &cmd_enc->pending_vblank_wq;

	wait_info.atomic_cnt = &cmd_enc->pending_vblank_cnt;

	wait_info.timeout_ms = KICKOFF_TIMEOUT_MS;



	atomic_inc(&cmd_enc->pending_vblank_cnt);



	rc = dpu_encoder_helper_wait_for_irq(phys_enc,

			phys_enc->irq[INTR_IDX_RDPTR],

			dpu_encoder_phys_cmd_te_rd_ptr_irq,

			&wait_info);



	return rc;

}



static void dpu_encoder_phys_cmd_handle_post_kickoff(

		struct dpu_encoder_phys *phys_enc)

{
@@ -729,7 +702,6 @@ static void dpu_encoder_phys_cmd_init_ops( 
	ops->wait_for_commit_done = dpu_encoder_phys_cmd_wait_for_commit_done;

	ops->prepare_for_kickoff = dpu_encoder_phys_cmd_prepare_for_kickoff;

	ops->wait_for_tx_complete = dpu_encoder_phys_cmd_wait_for_tx_complete;

	ops->wait_for_vblank = dpu_encoder_phys_cmd_wait_for_vblank;

	ops->trigger_start = dpu_encoder_phys_cmd_trigger_start;

	ops->needs_single_flush = dpu_encoder_phys_cmd_needs_single_flush;

	ops->irq_control = dpu_encoder_phys_cmd_irq_control;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

+4 −5
Original line number Diff line number Diff line
@@ -440,7 +440,7 @@ static void dpu_encoder_phys_vid_enable(struct dpu_encoder_phys *phys_enc) 
		phys_enc->enable_state = DPU_ENC_ENABLING;

}



static int dpu_encoder_phys_vid_wait_for_vblank(

static int dpu_encoder_phys_vid_wait_for_tx_complete(

		struct dpu_encoder_phys *phys_enc)

{

	struct dpu_encoder_wait_info wait_info;
@@ -554,7 +554,7 @@ static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc) 
	 * scanout buffer) don't latch properly..

	 */

	if (dpu_encoder_phys_vid_is_master(phys_enc)) {

		ret = dpu_encoder_phys_vid_wait_for_vblank(phys_enc);

		ret = dpu_encoder_phys_vid_wait_for_tx_complete(phys_enc);

		if (ret) {

			atomic_set(&phys_enc->pending_kickoff_cnt, 0);

			DRM_ERROR("wait disable failed: id:%u intf:%d ret:%d\n",
@@ -574,7 +574,7 @@ static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc) 
		spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags);

		dpu_encoder_phys_inc_pending(phys_enc);

		spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags);

		ret = dpu_encoder_phys_vid_wait_for_vblank(phys_enc);

		ret = dpu_encoder_phys_vid_wait_for_tx_complete(phys_enc);

		if (ret) {

			atomic_set(&phys_enc->pending_kickoff_cnt, 0);

			DRM_ERROR("wait disable failed: id:%u intf:%d ret:%d\n",
@@ -679,8 +679,7 @@ static void dpu_encoder_phys_vid_init_ops(struct dpu_encoder_phys_ops *ops) 
	ops->disable = dpu_encoder_phys_vid_disable;

	ops->control_vblank_irq = dpu_encoder_phys_vid_control_vblank_irq;

	ops->wait_for_commit_done = dpu_encoder_phys_vid_wait_for_commit_done;

	ops->wait_for_vblank = dpu_encoder_phys_vid_wait_for_vblank;

	ops->wait_for_tx_complete = dpu_encoder_phys_vid_wait_for_vblank;

	ops->wait_for_tx_complete = dpu_encoder_phys_vid_wait_for_tx_complete;

	ops->irq_control = dpu_encoder_phys_vid_irq_control;

	ops->prepare_for_kickoff = dpu_encoder_phys_vid_prepare_for_kickoff;

	ops->handle_post_kickoff = dpu_encoder_phys_vid_handle_post_kickoff;

drivers/gpu/drm/msm/msm_drv.h

+0 −2
Original line number Diff line number Diff line
@@ -78,12 +78,10 @@ enum msm_dsi_controller { 
 * enum msm_event_wait - type of HW events to wait for

 * @MSM_ENC_COMMIT_DONE - wait for the driver to flush the registers to HW

 * @MSM_ENC_TX_COMPLETE - wait for the HW to transfer the frame to panel

 * @MSM_ENC_VBLANK - wait for the HW VBLANK event (for driver-internal waiters)

 */

enum msm_event_wait {

	MSM_ENC_COMMIT_DONE = 0,

	MSM_ENC_TX_COMPLETE,

	MSM_ENC_VBLANK,

};



/**