Commit a120f802 authored by Ankit Nautiyal's avatar Ankit Nautiyal
Browse files

drm/i915/dp_mst: Rework pipe joiner logic in mode_valid



Refactor the logic to get the number of joined pipes. Start with a single
pipe and incrementally try additional pipes only if needed. While DSC
overhead is not yet computed here, this restructuring prepares the code to
support that in follow-up changes.

v2:
 - Remove fallback in case force-joiner configuration fails. (Imre)
 - Drop redundant MODE_OK assignment (Imre)
v3:
 - Align with the changes in intel_dp_mode_valid(). (Imre)
v4:
 - Set MODE_CLOCK_HIGH on DSC/rate failures aligning with SST case. (Imre)

Signed-off-by: default avatarAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260202103731.357416-9-ankit.k.nautiyal@intel.com
parent c80311c0
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+0 −2
Original line number Diff line number Diff line
@@ -1371,7 +1371,6 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
	return MODE_OK;
}

static
int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
{
	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
@@ -1434,7 +1433,6 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
	return true;
}

static
bool intel_dp_can_join(struct intel_display *display,
		       int num_joined_pipes)
{
+3 −0
Original line number Diff line number Diff line
@@ -225,5 +225,8 @@ int intel_dp_compute_config_late(struct intel_encoder *encoder,
				 struct drm_connector_state *conn_state);
int intel_dp_sdp_min_guardband(const struct intel_crtc_state *crtc_state,
			       bool assume_all_enabled);
int intel_dp_max_hdisplay_per_pipe(struct intel_display *display);
bool intel_dp_can_join(struct intel_display *display,
		       int num_joined_pipes);

#endif /* __INTEL_DP_H__ */
+48 −32
Original line number Diff line number Diff line
@@ -1420,7 +1420,6 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
	struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst.mgr;
	struct drm_dp_mst_port *port = connector->mst.port;
	const int min_bpp = 18;
	int max_dotclk = display->cdclk.max_dotclk_freq;
	int max_rate, mode_rate, max_lanes, max_link_clock;
	unsigned long bw_overhead_flags =
		DRM_DP_BW_OVERHEAD_MST | DRM_DP_BW_OVERHEAD_SSC_REF_CLK;
@@ -1480,10 +1479,22 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
		return 0;
	}

	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
						     mode->hdisplay, target_clock);
	*status = MODE_CLOCK_HIGH;
	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
		int max_dotclk = display->cdclk.max_dotclk_freq;

		if (connector->force_joined_pipes &&
		    num_joined_pipes != connector->force_joined_pipes)
			continue;

	if (intel_dp_has_dsc(connector) && drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
		if (!intel_dp_can_join(display, num_joined_pipes))
			continue;

		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
			continue;

		if (intel_dp_has_dsc(connector) &&
		    drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
			/*
			 * TBD pass the connector BPC,
			 * for now U8_MAX so that max BPC on that platform would be picked
@@ -1503,23 +1514,28 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,

		if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc) {
			*status = MODE_CLOCK_HIGH;
		return 0;
			continue;
		}

		if (mode_rate > max_rate && !dsc) {
			*status = MODE_CLOCK_HIGH;
		return 0;
			continue;
		}

		*status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);

		if (*status != MODE_OK)
		return 0;
			continue;

		max_dotclk *= num_joined_pipes;

	if (mode->clock > max_dotclk)
		if (mode->clock > max_dotclk) {
			*status = MODE_CLOCK_HIGH;
			continue;
		}

		break;
	}

	return 0;
}