Commit a1a548c5 authored by Naina Mehta's avatar Naina Mehta Committed by Wim Van Sebroeck
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watchdog: sbsa: Update the W_IIDR Implementer bit mask to 0xFFF 



The implementer mask defined in the driver [1] captures bits 0-10,
whereas section C.4.2 of BSA specification [2] indicates that bits
0-11 of the W_IIDR register represent the implementer JEP106 code.
Update the SBSA_GWDT_IMPL_MASK corresponding to bits 0-11, while
at it update SBSA_GWDT_VERSION_MASK mask to use GENMASK.

[1] #define SBSA_GWDT_IMPL_MASK    0x7FF

[2] Implementer, bits [11:0]
Contains the JEP106 code of the company that implemented the
Generic Watchdog:
Bits[11:8] The JEP106 continuation code of the implementer.
Bit[7] Always 0
Bits [6:0] The JEP106 identity code of the implementer.

Signed-off-by: default avatarNaina Mehta <naina.mehta@oss.qualcomm.com>
Acked-by: default avatarAaron Plattner <aplattner@nvidia.com>
Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarWim Van Sebroeck <wim@linux-watchdog.org>
parent b0fd1f58

drivers/watchdog/sbsa_gwdt.c

+2 −2
Original line number Diff line number Diff line
@@ -72,10 +72,10 @@ 
#define SBSA_GWDT_WCS_WS0	BIT(1)

#define SBSA_GWDT_WCS_WS1	BIT(2)



#define SBSA_GWDT_VERSION_MASK  0xF

#define SBSA_GWDT_VERSION_MASK  GENMASK(3, 0)

#define SBSA_GWDT_VERSION_SHIFT 16



#define SBSA_GWDT_IMPL_MASK	0x7FF

#define SBSA_GWDT_IMPL_MASK	GENMASK(11, 0)

#define SBSA_GWDT_IMPL_SHIFT	0

#define SBSA_GWDT_IMPL_MEDIATEK	0x426