Commit a1e062ab authored by Andy Shevchenko's avatar Andy Shevchenko
Browse files

MAINTAINERS: Add pin control and GPIO to the Intel MID record 



Intel MID record is not listed all related files. Add to there
pin control and GPIO drivers along with HSU (High Speed UART)
and HSU DMA.

Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
parent 112f5e09

MAINTAINERS

+7 −0
Original line number Diff line number Diff line
@@ -11846,12 +11846,19 @@ S: Supported 
F:	arch/x86/include/asm/intel-mid.h

F:	arch/x86/pci/intel_mid_pci.c

F:	arch/x86/platform/intel-mid/

F:	drivers/dma/hsu/

F:	drivers/extcon/extcon-intel-mrfld.c

F:	drivers/gpio/gpio-merrifield.c

F:	drivers/gpio/gpio-tangier.*

F:	drivers/iio/adc/intel_mrfld_adc.c

F:	drivers/mfd/intel_soc_pmic_mrfld.c

F:	drivers/pinctrl/intel/pinctrl-merrifield.c

F:	drivers/pinctrl/intel/pinctrl-moorefield.c

F:	drivers/pinctrl/intel/pinctrl-tangier.*

F:	drivers/platform/x86/intel/mrfld_pwrbtn.c

F:	drivers/platform/x86/intel_scu_*

F:	drivers/staging/media/atomisp/

F:	drivers/tty/serial/8250/8250_mid.c

F:	drivers/watchdog/intel-mid_wdt.c

F:	include/linux/mfd/intel_soc_pmic_mrfld.h

F:	include/linux/platform_data/x86/intel-mid_wdt.h