Commit a2790bf8 authored by Siddharth Vadapalli's avatar Siddharth Vadapalli Committed by Bjorn Helgaas
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PCI: j721e: Add support to build as a loadable module 



The 'pci-j721e.c' driver is the application/glue/wrapper driver for the
Cadence PCIe Controllers on TI SoCs. Implement support for building it as a
loadable module.

Signed-off-by: default avatarSiddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://patch.msgid.link/20250417124408.2752248-5-s-vadapalli@ti.com
parent 3a4b05c9

drivers/pci/controller/cadence/Kconfig

+3 −3
Original line number Diff line number Diff line
@@ -43,10 +43,10 @@ config PCIE_CADENCE_PLAT_EP 
	  different vendors SoCs.



config PCI_J721E

	bool

	tristate



config PCI_J721E_HOST

	bool "TI J721E PCIe controller (host mode)"

	tristate "TI J721E PCIe controller (host mode)"

	depends on ARCH_K3 || COMPILE_TEST

	depends on OF

	select PCIE_CADENCE_HOST
@@ -57,7 +57,7 @@ config PCI_J721E_HOST 
	  core.



config PCI_J721E_EP

	bool "TI J721E PCIe controller (endpoint mode)"

	tristate "TI J721E PCIe controller (endpoint mode)"

	depends on ARCH_K3 || COMPILE_TEST

	depends on OF

	depends on PCI_ENDPOINT

drivers/pci/controller/cadence/pci-j721e.c

+29 −1
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
#include <linux/irqchip/chained_irq.h>

#include <linux/irqdomain.h>

#include <linux/mfd/syscon.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/pci.h>

#include <linux/platform_device.h>
@@ -27,6 +28,7 @@ 
#define cdns_pcie_to_rc(p) container_of(p, struct cdns_pcie_rc, pcie)



#define ENABLE_REG_SYS_2	0x108

#define ENABLE_CLR_REG_SYS_2	0x308

#define STATUS_REG_SYS_2	0x508

#define STATUS_CLR_REG_SYS_2	0x708

#define LINK_DOWN		BIT(1)
@@ -116,6 +118,15 @@ static irqreturn_t j721e_pcie_link_irq_handler(int irq, void *priv) 
	return IRQ_HANDLED;

}



static void j721e_pcie_disable_link_irq(struct j721e_pcie *pcie)

{

	u32 reg;



	reg = j721e_pcie_intd_readl(pcie, ENABLE_CLR_REG_SYS_2);

	reg |= pcie->linkdown_irq_regfield;

	j721e_pcie_intd_writel(pcie, ENABLE_CLR_REG_SYS_2, reg);

}



static void j721e_pcie_config_link_irq(struct j721e_pcie *pcie)

{

	u32 reg;
@@ -633,9 +644,22 @@ static void j721e_pcie_remove(struct platform_device *pdev) 
	struct j721e_pcie *pcie = platform_get_drvdata(pdev);

	struct cdns_pcie *cdns_pcie = pcie->cdns_pcie;

	struct device *dev = &pdev->dev;

	struct cdns_pcie_ep *ep;

	struct cdns_pcie_rc *rc;



	if (pcie->mode == PCI_MODE_RC) {

		rc = container_of(cdns_pcie, struct cdns_pcie_rc, pcie);

		cdns_pcie_host_disable(rc);

	} else {

		ep = container_of(cdns_pcie, struct cdns_pcie_ep, pcie);

		cdns_pcie_ep_disable(ep);

	}



	gpiod_set_value_cansleep(pcie->reset_gpio, 0);



	clk_disable_unprepare(pcie->refclk);

	cdns_pcie_disable_phy(cdns_pcie);

	j721e_pcie_disable_link_irq(pcie);

	pm_runtime_put(dev);

	pm_runtime_disable(dev);

}
@@ -730,4 +754,8 @@ static struct platform_driver j721e_pcie_driver = { 
		.pm	= pm_sleep_ptr(&j721e_pcie_pm_ops),

	},

};

builtin_platform_driver(j721e_pcie_driver);
 
module_platform_driver(j721e_pcie_driver);



MODULE_LICENSE("GPL");

MODULE_DESCRIPTION("PCIe controller driver for TI's J721E and related SoCs");

MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");