Commit a2d8af57 authored by Dimitri Fedrau's avatar Dimitri Fedrau Committed by David S. Miller
Browse files

dt-bindings: net: dp83822: Add support for GPIO2 clock output 



The GPIO2 pin on the DP83822 can be configured as clock output. Add
binding to support this feature.

Signed-off-by: default avatarDimitri Fedrau <dimitri.fedrau@liebherr.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 2c2b61d2

Documentation/devicetree/bindings/net/ti,dp83822.yaml

+27 −0
Original line number Diff line number Diff line
@@ -96,6 +96,32 @@ properties: 
      - master

      - slave



  ti,gpio2-clk-out:

    description: |

       DP83822 PHY only.

       The GPIO2 pin on the DP83822 can be configured as clock output. When

       omitted, the PHY's default will be left as is.



       - 'mac-if': In MII mode the clock frequency is 25-MHz, in RMII Mode the

         clock frequency is 50-MHz and in RGMII Mode the clock frequency is

         25-MHz.

       - 'xi': XI clock(pass-through clock from XI pin).

       - 'int-ref': Internal reference clock 25-MHz.

       - 'rmii-master-mode-ref': RMII master mode reference clock 50-MHz. RMII

         master mode reference clock is identical to MAC IF clock in RMII master

         mode.

       - 'free-running': Free running clock 125-MHz.

       - 'recovered': Recovered clock is a 125-MHz recovered clock from a

         connected link partner.

    $ref: /schemas/types.yaml#/definitions/string

    enum:

      - mac-if

      - xi

      - int-ref

      - rmii-master-mode-ref

      - free-running

      - recovered



required:

  - reg
@@ -110,6 +136,7 @@ examples: 
        reg = <0>;

        rx-internal-delay-ps = <1>;

        tx-internal-delay-ps = <1>;

        ti,gpio2-clk-out = "xi";

      };

    };