Commit a2f61f1d authored by Shahar Shitrit's avatar Shahar Shitrit Committed by Jakub Kicinski
Browse files

net/mlx5: Relocate function declarations from port.h to mlx5_core.h 



The port header is a general file under include, yet it
contains declarations for functions that are either not
exported or exported but not used outside the mlx5_core
driver.

To enhance code organization, we move these declarations
to mlx5_core.h, where they are more appropriately scoped.

This refactor removes unnecessary exported symbols and
prevents unexported functions from being inadvertently
referenced outside of the mlx5_core driver.

Signed-off-by: default avatarShahar Shitrit <shshitrit@nvidia.com>
Reviewed-by: default avatarCarolina Jubran <cjubran@nvidia.com>
Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20250304160620.417580-2-tariqt@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 92d36905

drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h

+85 −0
Original line number Diff line number Diff line
@@ -114,6 +114,21 @@ struct mlx5_cmd_alias_obj_create_attr { 
	u8 access_key[ACCESS_KEY_LEN];

};



struct mlx5_port_eth_proto {

	u32 cap;

	u32 admin;

	u32 oper;

};



struct mlx5_module_eeprom_query_params {

	u16 size;

	u16 offset;

	u16 i2c_address;

	u32 page;

	u32 bank;

	u32 module_number;

};



static inline void mlx5_printk(struct mlx5_core_dev *dev, int level, const char *format, ...)

{

	struct device *device = dev->device;
@@ -280,6 +295,76 @@ int mlx5_set_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 arm, u8 mode); 
struct mlx5_dm *mlx5_dm_create(struct mlx5_core_dev *dev);

void mlx5_dm_cleanup(struct mlx5_core_dev *dev);



void mlx5_toggle_port_link(struct mlx5_core_dev *dev);

int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,

			       enum mlx5_port_status status);

int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,

				 enum mlx5_port_status *status);

int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);



int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);

int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause);

int mlx5_query_port_pause(struct mlx5_core_dev *dev,

			  u32 *rx_pause, u32 *tx_pause);



int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx);

int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx,

			u8 *pfc_en_rx);



int mlx5_set_port_stall_watermark(struct mlx5_core_dev *dev,

				  u16 stall_critical_watermark,

				  u16 stall_minor_watermark);

int mlx5_query_port_stall_watermark(struct mlx5_core_dev *dev,

				    u16 *stall_critical_watermark,

				    u16 *stall_minor_watermark);



int mlx5_max_tc(struct mlx5_core_dev *mdev);

int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc);

int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,

			    u8 prio, u8 *tc);

int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group);

int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,

			     u8 tc, u8 *tc_group);

int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw);

int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,

				u8 tc, u8 *bw_pct);

int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,

				    u8 *max_bw_value,

				    u8 *max_bw_unit);

int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,

				   u8 *max_bw_value,

				   u8 *max_bw_unit);

int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode);

int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode);



int mlx5_query_ports_check(struct mlx5_core_dev *mdev, u32 *out, int outlen);

int mlx5_set_ports_check(struct mlx5_core_dev *mdev, u32 *in, int inlen);

int mlx5_set_port_fcs(struct mlx5_core_dev *mdev, u8 enable);

void mlx5_query_port_fcs(struct mlx5_core_dev *mdev, bool *supported,

			 bool *enabled);

int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,

			     u16 offset, u16 size, u8 *data);

int

mlx5_query_module_eeprom_by_page(struct mlx5_core_dev *dev,

				 struct mlx5_module_eeprom_query_params *params,

				 u8 *data);



int mlx5_query_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *out);

int mlx5_set_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *in);

int mlx5_set_trust_state(struct mlx5_core_dev *mdev, u8 trust_state);

int mlx5_query_trust_state(struct mlx5_core_dev *mdev, u8 *trust_state);

int mlx5_set_dscp2prio(struct mlx5_core_dev *mdev, u8 dscp, u8 prio);

int mlx5_query_dscp2prio(struct mlx5_core_dev *mdev, u8 *dscp2prio);



int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext,

			      struct mlx5_port_eth_proto *eproto);

bool mlx5_ptys_ext_supported(struct mlx5_core_dev *mdev);

u32 mlx5_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper,

			 bool force_legacy);

u32 mlx5_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed,

			      bool force_legacy);

int mlx5_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);



#define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) &&		\

			    MLX5_CAP_GEN((mdev), pps_modify) &&		\

			    MLX5_CAP_MCAM_FEATURE((mdev), mtpps_fs) &&	\

drivers/net/ethernet/mellanox/mlx5/core/port.c

+0 −20
Original line number Diff line number Diff line
@@ -196,7 +196,6 @@ void mlx5_toggle_port_link(struct mlx5_core_dev *dev) 
	if (ps == MLX5_PORT_UP)

		mlx5_set_port_admin_status(dev, MLX5_PORT_UP);

}

EXPORT_SYMBOL_GPL(mlx5_toggle_port_link);



int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,

			       enum mlx5_port_status status)
@@ -210,7 +209,6 @@ int mlx5_set_port_admin_status(struct mlx5_core_dev *dev, 
	return mlx5_core_access_reg(dev, in, sizeof(in), out,

				    sizeof(out), MLX5_REG_PAOS, 0, 1);

}

EXPORT_SYMBOL_GPL(mlx5_set_port_admin_status);



int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,

				 enum mlx5_port_status *status)
@@ -227,7 +225,6 @@ int mlx5_query_port_admin_status(struct mlx5_core_dev *dev, 
	*status = MLX5_GET(paos_reg, out, admin_status);

	return 0;

}

EXPORT_SYMBOL_GPL(mlx5_query_port_admin_status);



static void mlx5_query_port_mtu(struct mlx5_core_dev *dev, u16 *admin_mtu,

				u16 *max_mtu, u16 *oper_mtu, u8 port)
@@ -257,7 +254,6 @@ int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port) 
	return mlx5_core_access_reg(dev, in, sizeof(in), out,

				   sizeof(out), MLX5_REG_PMTU, 0, 1);

}

EXPORT_SYMBOL_GPL(mlx5_set_port_mtu);



void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, u16 *max_mtu,

			     u8 port)
@@ -447,7 +443,6 @@ int mlx5_query_module_eeprom(struct mlx5_core_dev *dev, 


	return mlx5_query_mcia(dev, &query, data);

}

EXPORT_SYMBOL_GPL(mlx5_query_module_eeprom);



int mlx5_query_module_eeprom_by_page(struct mlx5_core_dev *dev,

				     struct mlx5_module_eeprom_query_params *params,
@@ -467,7 +462,6 @@ int mlx5_query_module_eeprom_by_page(struct mlx5_core_dev *dev, 


	return mlx5_query_mcia(dev, params, data);

}

EXPORT_SYMBOL_GPL(mlx5_query_module_eeprom_by_page);



static int mlx5_query_port_pvlc(struct mlx5_core_dev *dev, u32 *pvlc,

				int pvlc_size,  u8 local_port)
@@ -518,7 +512,6 @@ int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause) 
	return mlx5_core_access_reg(dev, in, sizeof(in), out,

				    sizeof(out), MLX5_REG_PFCC, 0, 1);

}

EXPORT_SYMBOL_GPL(mlx5_set_port_pause);



int mlx5_query_port_pause(struct mlx5_core_dev *dev,

			  u32 *rx_pause, u32 *tx_pause)
@@ -538,7 +531,6 @@ int mlx5_query_port_pause(struct mlx5_core_dev *dev, 


	return 0;

}

EXPORT_SYMBOL_GPL(mlx5_query_port_pause);



int mlx5_set_port_stall_watermark(struct mlx5_core_dev *dev,

				  u16 stall_critical_watermark,
@@ -597,7 +589,6 @@ int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx) 
	return mlx5_core_access_reg(dev, in, sizeof(in), out,

				    sizeof(out), MLX5_REG_PFCC, 0, 1);

}

EXPORT_SYMBOL_GPL(mlx5_set_port_pfc);



int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx, u8 *pfc_en_rx)

{
@@ -616,7 +607,6 @@ int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx, u8 *pfc_en_rx) 


	return 0;

}

EXPORT_SYMBOL_GPL(mlx5_query_port_pfc);



int mlx5_max_tc(struct mlx5_core_dev *mdev)

{
@@ -667,7 +657,6 @@ int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc) 


	return 0;

}

EXPORT_SYMBOL_GPL(mlx5_set_port_prio_tc);



int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,

			    u8 prio, u8 *tc)
@@ -689,7 +678,6 @@ int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev, 


	return err;

}

EXPORT_SYMBOL_GPL(mlx5_query_port_prio_tc);



static int mlx5_set_port_qetcr_reg(struct mlx5_core_dev *mdev, u32 *in,

				   int inlen)
@@ -728,7 +716,6 @@ int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group) 


	return mlx5_set_port_qetcr_reg(mdev, in, sizeof(in));

}

EXPORT_SYMBOL_GPL(mlx5_set_port_tc_group);



int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,

			     u8 tc, u8 *tc_group)
@@ -749,7 +736,6 @@ int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev, 


	return 0;

}

EXPORT_SYMBOL_GPL(mlx5_query_port_tc_group);



int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw)

{
@@ -763,7 +749,6 @@ int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw) 


	return mlx5_set_port_qetcr_reg(mdev, in, sizeof(in));

}

EXPORT_SYMBOL_GPL(mlx5_set_port_tc_bw_alloc);



int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,

				u8 tc, u8 *bw_pct)
@@ -784,7 +769,6 @@ int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev, 


	return 0;

}

EXPORT_SYMBOL_GPL(mlx5_query_port_tc_bw_alloc);



int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,

				    u8 *max_bw_value,
@@ -808,7 +792,6 @@ int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev, 


	return mlx5_set_port_qetcr_reg(mdev, in, sizeof(in));

}

EXPORT_SYMBOL_GPL(mlx5_modify_port_ets_rate_limit);



int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,

				   u8 *max_bw_value,
@@ -834,7 +817,6 @@ int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev, 


	return 0;

}

EXPORT_SYMBOL_GPL(mlx5_query_port_ets_rate_limit);



int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode)

{
@@ -845,7 +827,6 @@ int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode) 
	MLX5_SET(set_wol_rol_in, in, wol_mode, wol_mode);

	return mlx5_cmd_exec_in(mdev, set_wol_rol, in);

}

EXPORT_SYMBOL_GPL(mlx5_set_port_wol);



int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode)

{
@@ -860,7 +841,6 @@ int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode) 


	return err;

}

EXPORT_SYMBOL_GPL(mlx5_query_port_wol);



int mlx5_query_ports_check(struct mlx5_core_dev *mdev, u32 *out, int outlen)

{

include/linux/mlx5/port.h

+1 −84
Original line number Diff line number Diff line
@@ -61,15 +61,6 @@ enum mlx5_an_status { 
#define MLX5_EEPROM_PAGE_LENGTH		256

#define MLX5_EEPROM_HIGH_PAGE_LENGTH	128



struct mlx5_module_eeprom_query_params {

	u16 size;

	u16 offset;

	u16 i2c_address;

	u32 page;

	u32 bank;

	u32 module_number;

};



enum mlx5e_link_mode {

	MLX5E_1000BASE_CX_SGMII	 = 0,

	MLX5E_1000BASE_KX	 = 1,
@@ -145,12 +136,6 @@ enum mlx5_ptys_width { 
	MLX5_PTYS_WIDTH_12X	= 1 << 4,

};



struct mlx5_port_eth_proto {

	u32 cap;

	u32 admin;

	u32 oper;

};



#define MLX5E_PROT_MASK(link_mode) (1U << link_mode)

#define MLX5_GET_ETH_PROTO(reg, out, ext, field)	\

	(ext ? MLX5_GET(reg, out, ext_##field) :	\
@@ -163,14 +148,7 @@ int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys, 


int mlx5_query_ib_port_oper(struct mlx5_core_dev *dev, u16 *link_width_oper,

			    u16 *proto_oper, u8 local_port, u8 plane_index);

void mlx5_toggle_port_link(struct mlx5_core_dev *dev);

int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,

			       enum mlx5_port_status status);

int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,

				 enum mlx5_port_status *status);

int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);



int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);



void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, u16 *max_mtu, u8 port);

void mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, u16 *oper_mtu,

			      u8 port);
@@ -178,65 +156,4 @@ void mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, u16 *oper_mtu, 
int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,

			      u8 *vl_hw_cap, u8 local_port);



int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause);

int mlx5_query_port_pause(struct mlx5_core_dev *dev,

			  u32 *rx_pause, u32 *tx_pause);



int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx);

int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx,

			u8 *pfc_en_rx);



int mlx5_set_port_stall_watermark(struct mlx5_core_dev *dev,

				  u16 stall_critical_watermark,

				  u16 stall_minor_watermark);

int mlx5_query_port_stall_watermark(struct mlx5_core_dev *dev,

				    u16 *stall_critical_watermark, u16 *stall_minor_watermark);



int mlx5_max_tc(struct mlx5_core_dev *mdev);



int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc);

int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,

			    u8 prio, u8 *tc);

int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group);

int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,

			     u8 tc, u8 *tc_group);

int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw);

int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,

				u8 tc, u8 *bw_pct);

int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,

				    u8 *max_bw_value,

				    u8 *max_bw_unit);

int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,

				   u8 *max_bw_value,

				   u8 *max_bw_unit);

int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode);

int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode);



int mlx5_query_ports_check(struct mlx5_core_dev *mdev, u32 *out, int outlen);

int mlx5_set_ports_check(struct mlx5_core_dev *mdev, u32 *in, int inlen);

int mlx5_set_port_fcs(struct mlx5_core_dev *mdev, u8 enable);

void mlx5_query_port_fcs(struct mlx5_core_dev *mdev, bool *supported,

			 bool *enabled);

int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,

			     u16 offset, u16 size, u8 *data);

int mlx5_query_module_eeprom_by_page(struct mlx5_core_dev *dev,

				     struct mlx5_module_eeprom_query_params *params, u8 *data);



int mlx5_query_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *out);

int mlx5_set_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *in);



int mlx5_set_trust_state(struct mlx5_core_dev *mdev, u8 trust_state);

int mlx5_query_trust_state(struct mlx5_core_dev *mdev, u8 *trust_state);

int mlx5_set_dscp2prio(struct mlx5_core_dev *mdev, u8 dscp, u8 prio);

int mlx5_query_dscp2prio(struct mlx5_core_dev *mdev, u8 *dscp2prio);



int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext,

			      struct mlx5_port_eth_proto *eproto);

bool mlx5_ptys_ext_supported(struct mlx5_core_dev *mdev);

u32 mlx5_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper,

			 bool force_legacy);

u32 mlx5_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed,

			      bool force_legacy);

int mlx5_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);



#endif /* __MLX5_PORT_H__ */