Commit a2fcaef3 authored by Matt Roper's avatar Matt Roper
Browse files

drm/xe/topology: Convert register access to use xe_mmio 



Stop using GT pointers for register access.

Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240910234719.3335472-77-matthew.d.roper@intel.com
parent 9bc649b3

drivers/gpu/drm/xe/xe_gt_topology.c

+4 −4
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ load_dss_mask(struct xe_gt *gt, xe_dss_mask_t mask, int numregs, ...) 


	va_start(argp, numregs);

	for (i = 0; i < numregs; i++)

		fuse_val[i] = xe_mmio_read32(gt, va_arg(argp, struct xe_reg));

		fuse_val[i] = xe_mmio_read32(&gt->mmio, va_arg(argp, struct xe_reg));

	va_end(argp);



	bitmap_from_arr32(mask, fuse_val, numregs * 32);
@@ -35,7 +35,7 @@ static void 
load_eu_mask(struct xe_gt *gt, xe_eu_mask_t mask, enum xe_gt_eu_type *eu_type)

{

	struct xe_device *xe = gt_to_xe(gt);

	u32 reg_val = xe_mmio_read32(gt, XELP_EU_ENABLE);

	u32 reg_val = xe_mmio_read32(&gt->mmio, XELP_EU_ENABLE);

	u32 val = 0;

	int i;
@@ -127,7 +127,7 @@ static void 
load_l3_bank_mask(struct xe_gt *gt, xe_l3_bank_mask_t l3_bank_mask)

{

	struct xe_device *xe = gt_to_xe(gt);

	u32 fuse3 = xe_mmio_read32(gt, MIRROR_FUSE3);

	u32 fuse3 = xe_mmio_read32(&gt->mmio, MIRROR_FUSE3);



	if (GRAPHICS_VER(xe) >= 20) {

		xe_l3_bank_mask_t per_node = {};
@@ -141,7 +141,7 @@ load_l3_bank_mask(struct xe_gt *gt, xe_l3_bank_mask_t l3_bank_mask) 
		xe_l3_bank_mask_t per_node = {};

		xe_l3_bank_mask_t per_mask_bit = {};

		u32 meml3_en = REG_FIELD_GET(MEML3_EN_MASK, fuse3);

		u32 fuse4 = xe_mmio_read32(gt, XEHP_FUSE4);

		u32 fuse4 = xe_mmio_read32(&gt->mmio, XEHP_FUSE4);

		u32 bank_val = REG_FIELD_GET(GT_L3_EXC_MASK, fuse4);



		bitmap_set_value8(per_mask_bit, 0x3, 0);