Commit a315b723 authored by Cosmin Ratiu's avatar Cosmin Ratiu Committed by Jakub Kicinski
Browse files

net/mlx5e: Prepare for using different CQ doorbells 



Completion queues (CQs) in mlx5 use the same global doorbell, which may
become contended when accessed concurrently from many cores.

This patch prepares the CQ management code for supporting different
doorbells per CQ. This will be used in downstream patches to allow
separate doorbells to be used by channels CQs.

The main change is moving the 'uar' pointer from struct mlx5_core_cq to
struct mlx5e_cq, as the uar page to be used is better off stored
directly there. Other users of mlx5_core_cq also store the UAR to be
used separately and therefore the pointer being removed is dead weight
for them. As evidence, in this patch there are two users which set the
mcq.uar pointer but didn't use it, Software Steering and old Innova CQ
creation code. Instead, they rang the doorbell directly from another
pointer.

The 'uar' pointer added to struct mlx5e_cq remains in a hot cacheline
(as before), because it may get accessed for each packet.

Signed-off-by: default avatarCosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: default avatarDragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 673d7ab7

drivers/net/ethernet/mellanox/mlx5/core/cq.c

+0 −1
Original line number Diff line number Diff line
@@ -145,7 +145,6 @@ int mlx5_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq, 
		mlx5_core_dbg(dev, "failed adding CP 0x%x to debug file system\n",

			      cq->cqn);



	cq->uar = dev->priv.bfreg.up;

	cq->irqn = eq->core.irqn;



	return 0;

drivers/net/ethernet/mellanox/mlx5/core/en.h

+1 −0
Original line number Diff line number Diff line
@@ -344,6 +344,7 @@ struct mlx5e_cq { 
	/* data path - accessed per napi poll */

	u16                        event_ctr;

	struct napi_struct        *napi;

	struct mlx5_uars_page     *uar;

	struct mlx5_core_cq        mcq;

	struct mlx5e_ch_stats     *ch_stats;

drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h

+1 −4
Original line number Diff line number Diff line
@@ -309,10 +309,7 @@ mlx5e_notify_hw(struct mlx5_wq_cyc *wq, u16 pc, void __iomem *uar_map, 


static inline void mlx5e_cq_arm(struct mlx5e_cq *cq)

{

	struct mlx5_core_cq *mcq;



	mcq = &cq->mcq;

	mlx5_cq_arm(mcq, MLX5_CQ_DB_REQ_NOT, mcq->uar->map, cq->wq.cc);

	mlx5_cq_arm(&cq->mcq, MLX5_CQ_DB_REQ_NOT, cq->uar->map, cq->wq.cc);

}



static inline struct mlx5e_sq_dma *

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

+7 −3
Original line number Diff line number Diff line
@@ -2189,6 +2189,7 @@ static void mlx5e_close_xdpredirect_sq(struct mlx5e_xdpsq *xdpsq) 
static int mlx5e_alloc_cq_common(struct mlx5_core_dev *mdev,

				 struct net_device *netdev,

				 struct workqueue_struct *workqueue,

				 struct mlx5_uars_page *uar,

				 struct mlx5e_cq_param *param,

				 struct mlx5e_cq *cq)

{
@@ -2220,6 +2221,7 @@ static int mlx5e_alloc_cq_common(struct mlx5_core_dev *mdev, 
	cq->mdev = mdev;

	cq->netdev = netdev;

	cq->workqueue = workqueue;

	cq->uar = uar;



	return 0;

}
@@ -2235,7 +2237,8 @@ static int mlx5e_alloc_cq(struct mlx5_core_dev *mdev, 
	param->wq.db_numa_node  = ccp->node;

	param->eq_ix            = ccp->ix;



	err = mlx5e_alloc_cq_common(mdev, ccp->netdev, ccp->wq, param, cq);

	err = mlx5e_alloc_cq_common(mdev, ccp->netdev, ccp->wq,

				    mdev->priv.bfreg.up, param, cq);



	cq->napi     = ccp->napi;

	cq->ch_stats = ccp->ch_stats;
@@ -2280,7 +2283,7 @@ static int mlx5e_create_cq(struct mlx5e_cq *cq, struct mlx5e_cq_param *param) 
	MLX5_SET(cqc, cqc, cq_period_mode, mlx5e_cq_period_mode(param->cq_period_mode));



	MLX5_SET(cqc,   cqc, c_eqn_or_apu_element, eqn);

	MLX5_SET(cqc,   cqc, uar_page,      mdev->priv.bfreg.up->index);

	MLX5_SET(cqc,   cqc, uar_page,      cq->uar->index);

	MLX5_SET(cqc,   cqc, log_page_size, cq->wq_ctrl.buf.page_shift -

					    MLX5_ADAPTER_PAGE_SHIFT);

	MLX5_SET64(cqc, cqc, dbr_addr,      cq->wq_ctrl.db.dma);
@@ -3593,7 +3596,8 @@ static int mlx5e_alloc_drop_cq(struct mlx5e_priv *priv, 
	param->wq.buf_numa_node = dev_to_node(mlx5_core_dma_dev(mdev));

	param->wq.db_numa_node  = dev_to_node(mlx5_core_dma_dev(mdev));



	return mlx5e_alloc_cq_common(priv->mdev, priv->netdev, priv->wq, param, cq);

	return mlx5e_alloc_cq_common(priv->mdev, priv->netdev, priv->wq,

				     mdev->priv.bfreg.up, param, cq);

}



int mlx5e_open_drop_rq(struct mlx5e_priv *priv,

drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c

+0 −1
Original line number Diff line number Diff line
@@ -475,7 +475,6 @@ static int mlx5_fpga_conn_create_cq(struct mlx5_fpga_conn *conn, int cq_size) 
	*conn->cq.mcq.arm_db    = 0;

	conn->cq.mcq.vector     = 0;

	conn->cq.mcq.comp       = mlx5_fpga_conn_cq_complete;

	conn->cq.mcq.uar        = fdev->conn_res.uar;

	tasklet_setup(&conn->cq.tasklet, mlx5_fpga_conn_cq_tasklet);



	mlx5_fpga_dbg(fdev, "Created CQ #0x%x\n", conn->cq.mcq.cqn);