Unverified Commit a32f7d76 authored by Xi Pardee's avatar Xi Pardee Committed by Ilpo Järvinen
Browse files

platform/x86:intel/pmc: Add DMU GUID to Arrow Lake U/H 



Arrow Lake U/H platforms may have multiple GUIDs pointing to the
same telemetry region. Add the second possible GUID to the GUID
list to support the Arrow Lake U/H platforms with this GUID.

Signed-off-by: default avatarXi Pardee <xi.pardee@linux.intel.com>
Link: https://patch.msgid.link/20251014214548.629023-4-xi.pardee@linux.intel.com


Reviewed-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
parent 3b603955

drivers/platform/x86/intel/pmc/arl.c

+1 −1
Original line number Diff line number Diff line
@@ -733,7 +733,7 @@ struct pmc_dev_info arl_pmc_dev = { 
	.sub_req = pmc_core_pmt_get_lpm_req,

};



static u32 ARL_H_PMT_DMU_GUIDS[] = {ARL_PMT_DMU_GUID, 0x0};

static u32 ARL_H_PMT_DMU_GUIDS[] = {ARL_PMT_DMU_GUID, ARL_H_PMT_DMU_GUID, 0x0};

struct pmc_dev_info arl_h_pmc_dev = {

	.pci_func = 2,

	.dmu_guids = ARL_H_PMT_DMU_GUIDS,

drivers/platform/x86/intel/pmc/core.h

+1 −0
Original line number Diff line number Diff line
@@ -283,6 +283,7 @@ enum ppfear_regs { 
#define MTL_PMT_DMU_DIE_C6_OFFSET		15

#define MTL_PMT_DMU_GUID			0x1A067102

#define ARL_PMT_DMU_GUID			0x1A06A102

#define ARL_H_PMT_DMU_GUID			0x1A06A101



#define LNL_PMC_MMIO_REG_LEN			0x2708

#define LNL_PMC_LTR_OSSE			0x1B88