Commit a36a0b28 authored by Mehdi Djait's avatar Mehdi Djait Committed by Hans Verkuil
Browse files

media: dt-bindings: add rockchip px30 vip 



Add documentation for the Rockchip PX30 Video Input Processor (VIP).

Signed-off-by: default avatarMehdi Djait <mehdi.djait@bootlin.com>
[revised description]
Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Signed-off-by: default avatarMichael Riesch <michael.riesch@wolfvision.net>
Reviewed-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: default avatarMichael Riesch <michael.riesch@collabora.com>
Signed-off-by: default avatarSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: default avatarHans Verkuil <hverkuil+cisco@kernel.org>
parent 4a09126a

Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/media/rockchip,px30-vip.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Rockchip PX30 Video Input Processor (VIP)



maintainers:

  - Mehdi Djait <mehdi.djait@linux.intel.com>

  - Michael Riesch <michael.riesch@collabora.com>



description:

  The Rockchip PX30 Video Input Processor (VIP) receives the data from a camera

  sensor or CCIR656 encoder and transfers it into system main memory by AXI bus.



properties:

  compatible:

    const: rockchip,px30-vip



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    items:

      - description: ACLK

      - description: HCLK

      - description: PCLK



  clock-names:

    items:

      - const: aclk

      - const: hclk

      - const: pclk



  resets:

    items:

      - description: AXI

      - description: AHB

      - description: PCLK IN



  reset-names:

    items:

      - const: axi

      - const: ahb

      - const: pclkin



  power-domains:

    maxItems: 1



  ports:

    $ref: /schemas/graph.yaml#/properties/ports



    properties:

      port@0:

        $ref: /schemas/graph.yaml#/$defs/port-base

        unevaluatedProperties: false

        description: input port on the parallel interface



        properties:

          endpoint:

            $ref: video-interfaces.yaml#

            unevaluatedProperties: false



            properties:

              bus-type:

                enum:

                  - 5 # MEDIA_BUS_TYPE_PARALLEL

                  - 6 # MEDIA_BUS_TYPE_BT656



            required:

              - bus-type



    required:

      - port@0



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - ports



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/px30-cru.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/media/video-interfaces.h>

    #include <dt-bindings/power/px30-power.h>



    soc {

        #address-cells = <2>;

        #size-cells = <2>;



        video-capture@ff490000 {

            compatible = "rockchip,px30-vip";

            reg = <0x0 0xff490000 0x0 0x200>;

            interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;

            clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>, <&cru PCLK_CIF>;

            clock-names = "aclk", "hclk", "pclk";

            power-domains = <&power PX30_PD_VI>;

            resets = <&cru SRST_CIF_A>, <&cru SRST_CIF_H>, <&cru SRST_CIF_PCLKIN>;

            reset-names = "axi", "ahb", "pclkin";



            ports {

                #address-cells = <1>;

                #size-cells = <0>;



                port@0 {

                    reg = <0>;



                    cif_in: endpoint {

                        remote-endpoint = <&tw9900_out>;

                        bus-type = <MEDIA_BUS_TYPE_BT656>;

                    };

                };

            };

        };

    };

MAINTAINERS

+1 −0
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@@ -22269,6 +22269,7 @@ M: Michael Riesch <michael.riesch@collabora.com> 
L:	linux-media@vger.kernel.org

S:	Maintained

F:	Documentation/admin-guide/media/rkcif*

F:	Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml









ROCKCHIP CRYPTO DRIVERS









M:	Corentin Labbe <clabbe@baylibre.com>