Unverified Commit a37d9c8a authored by Brian Masney's avatar Brian Masney Committed by Mark Brown
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ASoC: codecs: rt5682s: convert from round_rate() to determine_rate() 



The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Signed-off-by: default avatarBrian Masney <bmasney@redhat.com>
Link: https://patch.msgid.link/20250710-sound-clk-round-rate-v1-3-4a9c3bb6ff3a@redhat.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 4e15a10f

sound/soc/codecs/rt5682s.c

+14 −12
Original line number Diff line number Diff line
@@ -2610,8 +2610,8 @@ static unsigned long rt5682s_wclk_recalc_rate(struct clk_hw *hw, 
	return rt5682s->lrck[RT5682S_AIF1];

}



static long rt5682s_wclk_round_rate(struct clk_hw *hw, unsigned long rate,

				   unsigned long *parent_rate)

static int rt5682s_wclk_determine_rate(struct clk_hw *hw,

				       struct clk_rate_request *req)

{

	struct rt5682s_priv *rt5682s =

		container_of(hw, struct rt5682s_priv, dai_clks_hw[RT5682S_DAI_WCLK_IDX]);
@@ -2624,13 +2624,13 @@ static long rt5682s_wclk_round_rate(struct clk_hw *hw, unsigned long rate, 
	 * Only accept to set wclk rate to 44.1k or 48kHz.

	 * It will force to 48kHz if not both.

	 */

	if (rate != CLK_48 && rate != CLK_44) {

	if (req->rate != CLK_48 && req->rate != CLK_44) {

		dev_warn(component->dev, "%s: clk %s only support %d or %d Hz output\n",

			__func__, clk_name, CLK_44, CLK_48);

		rate = CLK_48;

		req->rate = CLK_48;

	}



	return rate;

	return 0;

}



static int rt5682s_wclk_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -2719,14 +2719,14 @@ static unsigned long rt5682s_bclk_get_factor(unsigned long rate, 
		return 256;

}



static long rt5682s_bclk_round_rate(struct clk_hw *hw, unsigned long rate,

				   unsigned long *parent_rate)

static int rt5682s_bclk_determine_rate(struct clk_hw *hw,

				       struct clk_rate_request *req)

{

	struct rt5682s_priv *rt5682s =

		container_of(hw, struct rt5682s_priv, dai_clks_hw[RT5682S_DAI_BCLK_IDX]);

	unsigned long factor;



	if (!*parent_rate || !rt5682s_clk_check(rt5682s))

	if (!req->best_parent_rate || !rt5682s_clk_check(rt5682s))

		return -EINVAL;



	/*
@@ -2736,9 +2736,11 @@ static long rt5682s_bclk_round_rate(struct clk_hw *hw, unsigned long rate, 
	 * and find the appropriate multiplier of BCLK to

	 * get the rounded down BCLK value.

	 */

	factor = rt5682s_bclk_get_factor(rate, *parent_rate);

	factor = rt5682s_bclk_get_factor(req->rate, req->best_parent_rate);



	req->rate = req->best_parent_rate * factor;



	return *parent_rate * factor;

	return 0;

}



static int rt5682s_bclk_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -2769,12 +2771,12 @@ static const struct clk_ops rt5682s_dai_clk_ops[RT5682S_DAI_NUM_CLKS] = { 
		.prepare = rt5682s_wclk_prepare,

		.unprepare = rt5682s_wclk_unprepare,

		.recalc_rate = rt5682s_wclk_recalc_rate,

		.round_rate = rt5682s_wclk_round_rate,

		.determine_rate = rt5682s_wclk_determine_rate,

		.set_rate = rt5682s_wclk_set_rate,

	},

	[RT5682S_DAI_BCLK_IDX] = {

		.recalc_rate = rt5682s_bclk_recalc_rate,

		.round_rate = rt5682s_bclk_round_rate,

		.determine_rate = rt5682s_bclk_determine_rate,

		.set_rate = rt5682s_bclk_set_rate,

	},

};