Commit a3ec2d38 authored by Johan Jonker's avatar Johan Jonker Committed by Heiko Stuebner
Browse files

ARM: dts: rockchip: add #power-domain-cells to power domain nodes 



Add #power-domain-cells to power domain nodes, because they
are required by power-domain.yaml

Signed-off-by: default avatarJohan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-5-jbx6244@gmail.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 970cdc53

arch/arm/boot/dts/rk3066a.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -780,6 +780,7 @@ power-domain@RK3066_PD_VIO { 
				 <&qos_cif1>,

				 <&qos_ipp>,

				 <&qos_rga>;

			#power-domain-cells = <0>;

		};



		power-domain@RK3066_PD_VIDEO {
@@ -789,12 +790,14 @@ power-domain@RK3066_PD_VIDEO { 
				 <&cru HCLK_VDPU>,

				 <&cru HCLK_VEPU>;

			pm_qos = <&qos_vpu>;

			#power-domain-cells = <0>;

		};



		power-domain@RK3066_PD_GPU {

			reg = <RK3066_PD_GPU>;

			clocks = <&cru ACLK_GPU>;

			pm_qos = <&qos_gpu>;

			#power-domain-cells = <0>;

		};

	};

};

arch/arm/boot/dts/rk3188.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -719,6 +719,7 @@ power-domain@RK3188_PD_VIO { 
				 <&qos_cif0>,

				 <&qos_ipp>,

				 <&qos_rga>;

			#power-domain-cells = <0>;

		};



		power-domain@RK3188_PD_VIDEO {
@@ -728,12 +729,14 @@ power-domain@RK3188_PD_VIDEO { 
				 <&cru HCLK_VDPU>,

				 <&cru HCLK_VEPU>;

			pm_qos = <&qos_vpu>;

			#power-domain-cells = <0>;

		};



		power-domain@RK3188_PD_GPU {

			reg = <RK3188_PD_GPU>;

			clocks = <&cru ACLK_GPU>;

			pm_qos = <&qos_gpu>;

			#power-domain-cells = <0>;

		};

	};

};

arch/arm/boot/dts/rk3288.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -801,6 +801,7 @@ power-domain@RK3288_PD_VIO { 
					 <&qos_vio2_rga_r>,

					 <&qos_vio2_rga_w>,

					 <&qos_vio1_isp_r>;

				#power-domain-cells = <0>;

			};



			/*
@@ -814,6 +815,7 @@ power-domain@RK3288_PD_HEVC { 
					 <&cru SCLK_HEVC_CORE>;

				pm_qos = <&qos_hevc_r>,

					 <&qos_hevc_w>;

				#power-domain-cells = <0>;

			};



			/*
@@ -826,6 +828,7 @@ power-domain@RK3288_PD_VIDEO { 
				clocks = <&cru ACLK_VCODEC>,

					 <&cru HCLK_VCODEC>;

				pm_qos = <&qos_video>;

				#power-domain-cells = <0>;

			};



			/*
@@ -837,6 +840,7 @@ power-domain@RK3288_PD_GPU { 
				clocks = <&cru ACLK_GPU>;

				pm_qos = <&qos_gpu_r>,

					 <&qos_gpu_w>;

				#power-domain-cells = <0>;

			};

		};