Commit a40f93e9 authored by Mike Tipton's avatar Mike Tipton Committed by Georgi Djakov
Browse files

interconnect: qcom: sm8650: Use correct ACV enable_mask 



The ACV enable_mask is historically BIT(3), but it's BIT(0) on this
target. Fix it.

Fixes: c062bcab ("interconnect: qcom: introduce RPMh Network-On-Chip Interconnect on SM8650 SoC")
Signed-off-by: default avatarMike Tipton <quic_mdtipton@quicinc.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240202014806.7876-2-quic_mdtipton@quicinc.com


Signed-off-by: default avatarGeorgi Djakov <djakov@kernel.org>
parent 24406f67

drivers/interconnect/qcom/sm8650.c

+1 −1
Original line number Diff line number Diff line
@@ -1160,7 +1160,7 @@ static struct qcom_icc_node qns_gemnoc_sf = { 


static struct qcom_icc_bcm bcm_acv = {

	.name = "ACV",

	.enable_mask = BIT(3),

	.enable_mask = BIT(0),

	.num_nodes = 1,

	.nodes = { &ebi },

};