Commit a4184174 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

alpha: drop pre-EV56 support 

All EV4 machines are already gone, and the remaining EV5 based machines
all support the slightly more modern EV56 generation as well.
Debian only supports EV56 and later.

Drop both of these and build kernels optimized for EV56 and higher
when the "generic" options is selected, tuning for an out-of-order
EV6 pipeline, same as Debian userspace.

Since this was the only supported architecture without 8-bit and
16-bit stores, common kernel code no longer has to worry about
aligning struct members, and existing workarounds from the block
and tty layers can be removed.

The alpha memory management code no longer needs an abstraction
for the differences between EV4 and EV5+.

Link: https://lists.debian.org/debian-alpha/2023/05/msg00009.html


Acked-by: default avatarPaul E. McKenney <paulmck@kernel.org>
Acked-by: default avatarMatt Turner <mattst88@gmail.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 4bf85907

arch/alpha/Kconfig

+3 −18
Original line number Diff line number Diff line
@@ -240,29 +240,14 @@ config ISA_DMA_API 
	bool

	default y



config ALPHA_EV4

	bool



config ALPHA_EV5

	bool

	default y if ALPHA_RX164 || ALPHA_RAWHIDE || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_SABLE || ALPHA_NORITAKE || ALPHA_MIKASA || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_EB164 || ALPHA_ALCOR



config ALPHA_CIA

	bool

	depends on ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_NORITAKE || ALPHA_MIKASA || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_ALCOR

	default y



config ALPHA_EV56

	bool "EV56 CPU (speed >= 366MHz)?" if ALPHA_ALCOR

	default y if ALPHA_RX164 || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_PC164 || ALPHA_TAKARA



config ALPHA_EV56

	prompt "EV56 CPU (speed >= 333MHz)?"

	depends on ALPHA_NORITAKE || ALPHA_MIKASA



config ALPHA_EV56

	prompt "EV56 CPU (speed >= 400MHz)?"

	depends on ALPHA_RAWHIDE

	bool

	default y if ALPHA_ALCOR || ALPHA_RX164 || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_NORITAKE || ALPHA_MIKASA || ALPHA_RAWHIDE || ALPHA_SABLE



config ALPHA_T2

	bool
@@ -403,7 +388,7 @@ config ARCH_SPARSEMEM_ENABLE 
config ALPHA_WTINT

	bool "Use WTINT" if ALPHA_SRM || ALPHA_GENERIC

	default y if ALPHA_QEMU

	default n if ALPHA_EV5 || ALPHA_EV56

	default n if ALPHA_EV56

	default n if !ALPHA_SRM && !ALPHA_GENERIC

	default y if SMP

	help

arch/alpha/Makefile

+2 −6
Original line number Diff line number Diff line
@@ -15,18 +15,14 @@ CHECKFLAGS += -D__alpha__ 
cflags-y	:= -pipe -mno-fp-regs -ffixed-8

cflags-y	+= $(call cc-option, -fno-jump-tables)



cpuflags-$(CONFIG_ALPHA_EV4)		:= -mcpu=ev4

cpuflags-$(CONFIG_ALPHA_EV5)		:= -mcpu=ev5

cpuflags-$(CONFIG_ALPHA_EV56)		:= -mcpu=ev56

cpuflags-$(CONFIG_ALPHA_POLARIS)	:= -mcpu=pca56

cpuflags-$(CONFIG_ALPHA_SX164)		:= -mcpu=pca56

cpuflags-$(CONFIG_ALPHA_EV6)		:= -mcpu=ev6

cpuflags-$(CONFIG_ALPHA_EV67)		:= -mcpu=ev67

# If GENERIC, make sure to turn off any instruction set extensions that

# the host compiler might have on by default.  Given that EV4 and EV5

# have the same instruction set, prefer EV5 because an EV5 schedule is

# more likely to keep an EV4 processor busy than vice-versa.

cpuflags-$(CONFIG_ALPHA_GENERIC)	:= -mcpu=ev5

# the host compiler might have on by default.

cpuflags-$(CONFIG_ALPHA_GENERIC)	:= -mcpu=ev56 -mtune=ev6



cflags-y				+= $(cpuflags-y)

arch/alpha/include/asm/elf.h

+1 −3
Original line number Diff line number Diff line
@@ -133,9 +133,7 @@ extern int dump_elf_task(elf_greg_t *dest, struct task_struct *task); 
#define ELF_PLATFORM				\

({						\

	enum implver_enum i_ = implver();	\

	( i_ == IMPLVER_EV4 ? "ev4"		\

	: i_ == IMPLVER_EV5			\

	  ? (amask(AMASK_BWX) ? "ev5" : "ev56")	\

	( i_ == IMPLVER_EV5 ? "ev56"			\

	: amask (AMASK_CIX) ? "ev6" : "ev67");	\

})

arch/alpha/include/asm/machvec.h

+0 −9
Original line number Diff line number Diff line
@@ -72,15 +72,6 @@ struct alpha_machine_vector 
	int (*mv_is_ioaddr)(unsigned long);

	int (*mv_is_mmio)(const volatile void __iomem *);



	void (*mv_switch_mm)(struct mm_struct *, struct mm_struct *,

			     struct task_struct *);

	void (*mv_activate_mm)(struct mm_struct *, struct mm_struct *);



	void (*mv_flush_tlb_current)(struct mm_struct *);

	void (*mv_flush_tlb_current_page)(struct mm_struct * mm,

					  struct vm_area_struct *vma,

					  unsigned long addr);



	void (*update_irq_hw)(unsigned long, unsigned long, int);

	void (*ack_irq)(unsigned long);

	void (*device_interrupt)(unsigned long vector);

arch/alpha/include/asm/mmu_context.h

+3 −42
Original line number Diff line number Diff line
@@ -71,9 +71,7 @@ __reload_thread(struct pcb_struct *pcb) 
#ifdef CONFIG_ALPHA_GENERIC

# define MAX_ASN	(alpha_mv.max_asn)

#else

# ifdef CONFIG_ALPHA_EV4

#  define MAX_ASN	EV4_MAX_ASN

# elif defined(CONFIG_ALPHA_EV5)

# if defined(CONFIG_ALPHA_EV56)

#  define MAX_ASN	EV5_MAX_ASN

# else

#  define MAX_ASN	EV6_MAX_ASN
@@ -162,26 +160,6 @@ ev5_switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm, 
	task_thread_info(next)->pcb.asn = mmc & HARDWARE_ASN_MASK;

}



__EXTERN_INLINE void

ev4_switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm,

	      struct task_struct *next)

{

	/* As described, ASN's are broken for TLB usage.  But we can

	   optimize for switching between threads -- if the mm is

	   unchanged from current we needn't flush.  */

	/* ??? May not be needed because EV4 PALcode recognizes that

	   ASN's are broken and does a tbiap itself on swpctx, under

	   the "Must set ASN or flush" rule.  At least this is true

	   for a 1992 SRM, reports Joseph Martin (jmartin@hlo.dec.com).

	   I'm going to leave this here anyway, just to Be Sure.  -- r~  */

	if (prev_mm != next_mm)

		tbiap();



	/* Do continue to allocate ASNs, because we can still use them

	   to avoid flushing the icache.  */

	ev5_switch_mm(prev_mm, next_mm, next);

}



extern void __load_new_mm_context(struct mm_struct *);

asmlinkage void do_page_fault(unsigned long address, unsigned long mmcsr,

			      long cause, struct pt_regs *regs);
@@ -209,25 +187,8 @@ ev5_activate_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm) 
	__load_new_mm_context(next_mm);

}



__EXTERN_INLINE void

ev4_activate_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm)

{

	__load_new_mm_context(next_mm);

	tbiap();

}



#ifdef CONFIG_ALPHA_GENERIC

# define switch_mm(a,b,c)	alpha_mv.mv_switch_mm((a),(b),(c))

# define activate_mm(x,y)	alpha_mv.mv_activate_mm((x),(y))

#else

# ifdef CONFIG_ALPHA_EV4

#  define switch_mm(a,b,c)	ev4_switch_mm((a),(b),(c))

#  define activate_mm(x,y)	ev4_activate_mm((x),(y))

# else

#define switch_mm(a,b,c)	ev5_switch_mm((a),(b),(c))

#define activate_mm(x,y)	ev5_activate_mm((x),(y))

# endif

#endif



#define init_new_context init_new_context

static inline int