Unverified Commit a49ab905 authored by Anup Patel's avatar Anup Patel Committed by Palmer Dabbelt
Browse files

RISC-V: Implement arch specific PMEM APIs 



The NVDIMM PMEM driver expects arch specific APIs for cache maintenance
and if arch does not provide these APIs then NVDIMM PMEM driver will
always use MEMREMAP_WT to map persistent memory which in-turn maps as
UC memory type defined by the RISC-V Svpbmt specification.

Now that the Svpbmt and Zicbom support is available in RISC-V kernel,
we implement PMEM APIs using ALT_CMO_OP() macros so that the NVDIMM
PMEM driver can use MEMREMAP_WB to map persistent memory.

Co-developed-by: default avatarMayuresh Chitale <mchitale@ventanamicro.com>
Signed-off-by: default avatarMayuresh Chitale <mchitale@ventanamicro.com>
Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221114090536.1662624-3-apatel@ventanamicro.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent b91676fc

arch/riscv/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ config RISCV 
	select ARCH_HAS_GIGANTIC_PAGE

	select ARCH_HAS_KCOV

	select ARCH_HAS_MMIOWB

	select ARCH_HAS_PMEM_API

	select ARCH_HAS_PTE_SPECIAL

	select ARCH_HAS_SET_DIRECT_MAP if MMU

	select ARCH_HAS_SET_MEMORY if MMU

arch/riscv/mm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ obj-y += extable.o 
obj-$(CONFIG_MMU) += fault.o pageattr.o

obj-y += cacheflush.o

obj-y += context.o

obj-y += pmem.o



ifeq ($(CONFIG_MMU),y)

obj-$(CONFIG_SMP) += tlbflush.o

arch/riscv/mm/pmem.c

0 → 100644
+21 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Copyright (C) 2022 Ventana Micro Systems Inc.

 */



#include <linux/export.h>

#include <linux/libnvdimm.h>



#include <asm/cacheflush.h>



void arch_wb_cache_pmem(void *addr, size_t size)

{

	ALT_CMO_OP(clean, addr, size, riscv_cbom_block_size);

}

EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);



void arch_invalidate_pmem(void *addr, size_t size)

{

	ALT_CMO_OP(inval, addr, size, riscv_cbom_block_size);

}

EXPORT_SYMBOL_GPL(arch_invalidate_pmem);