Commit a4ea64ab authored by Jarkko Nikula's avatar Jarkko Nikula Committed by Alexandre Belloni
Browse files

i3c: mipi-i3c-hci: Convert remaining DBG() prints to dev_dbg() 



Get rid of local DBG() macro and convert remaining debug prints to
dev_dbg() which can be controlled without code recompile when kernel is
built with dynamic debug support.

Signed-off-by: default avatarJarkko Nikula <jarkko.nikula@linux.intel.com>
Link: https://lore.kernel.org/r/20250827103009.243771-6-jarkko.nikula@linux.intel.com


Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
parent a00e15f3

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

+6 −3
Original line number Diff line number Diff line
@@ -317,7 +317,9 @@ static int hci_cmd_v1_daa(struct i3c_hci *hci) 
			break;

		next_addr = ret;



		DBG("next_addr = 0x%02x, DAA using DAT %d", next_addr, dat_idx);

		dev_dbg(&hci->master.dev,

			"next_addr = 0x%02x, DAA using DAT %d",

			next_addr, dat_idx);

		mipi_i3c_hci_dat_v1.set_dynamic_addr(hci, dat_idx, next_addr);

		mipi_i3c_hci_dct_index_reset(hci);
@@ -349,7 +351,8 @@ static int hci_cmd_v1_daa(struct i3c_hci *hci) 
		}



		i3c_hci_dct_get_val(hci, 0, &pid, &dcr, &bcr);

		DBG("assigned address %#x to device PID=0x%llx DCR=%#x BCR=%#x",

		dev_dbg(&hci->master.dev,

			"assigned address %#x to device PID=0x%llx DCR=%#x BCR=%#x",

			next_addr, pid, dcr, bcr);



		mipi_i3c_hci_dat_v1.free_entry(hci, dat_idx);

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

+4 −3
Original line number Diff line number Diff line
@@ -261,7 +261,7 @@ static int hci_cmd_v2_daa(struct i3c_hci *hci) 
		if (ret < 0)

			break;

		next_addr = ret;

		DBG("next_addr = 0x%02x", next_addr);

		dev_dbg(&hci->master.dev, "next_addr = 0x%02x", next_addr);

		xfer[0].cmd_tid = hci_get_tid();

		xfer[0].cmd_desc[0] =

			CMD_0_ATTR_A |
@@ -293,7 +293,8 @@ static int hci_cmd_v2_daa(struct i3c_hci *hci) 
		pid = (pid << 32) | device_id[0];

		bcr = FIELD_GET(W1_MASK(55, 48), device_id[1]);

		dcr = FIELD_GET(W1_MASK(63, 56), device_id[1]);

		DBG("assigned address %#x to device PID=0x%llx DCR=%#x BCR=%#x",

		dev_dbg(&hci->master.dev,

			"assigned address %#x to device PID=0x%llx DCR=%#x BCR=%#x",

			next_addr, pid, dcr, bcr);

		/*

		 * TODO: Extend the subsystem layer to allow for registering

drivers/i3c/master/mipi-i3c-hci/core.c

+8 −8
Original line number Diff line number Diff line
@@ -147,7 +147,7 @@ static int i3c_hci_bus_init(struct i3c_master_controller *m) 
		amd_set_resp_buf_thld(hci);



	reg_set(HC_CONTROL, HC_CONTROL_BUS_ENABLE);

	DBG("HC_CONTROL = %#x", reg_read(HC_CONTROL));

	dev_dbg(&hci->master.dev, "HC_CONTROL = %#x", reg_read(HC_CONTROL));



	return 0;

}
@@ -192,7 +192,7 @@ static int i3c_hci_send_ccc_cmd(struct i3c_master_controller *m, 
	DECLARE_COMPLETION_ONSTACK(done);

	int i, last, ret = 0;



	DBG("cmd=%#x rnw=%d ndests=%d data[0].len=%d",

	dev_dbg(&hci->master.dev, "cmd=%#x rnw=%d ndests=%d data[0].len=%d",

		ccc->id, ccc->rnw, ccc->ndests, ccc->dests[0].payload.len);



	xfer = hci_alloc_xfer(nxfers);
@@ -251,7 +251,7 @@ static int i3c_hci_send_ccc_cmd(struct i3c_master_controller *m, 
	}



	if (ccc->rnw)

		DBG("got: %*ph",

		dev_dbg(&hci->master.dev, "got: %*ph",

			ccc->dests[0].payload.len, ccc->dests[0].payload.data);



out:
@@ -277,7 +277,7 @@ static int i3c_hci_priv_xfers(struct i3c_dev_desc *dev, 
	unsigned int size_limit;

	int i, last, ret = 0;



	DBG("nxfers = %d", nxfers);

	dev_dbg(&hci->master.dev, "nxfers = %d", nxfers);



	xfer = hci_alloc_xfer(nxfers);

	if (!xfer)
@@ -335,7 +335,7 @@ static int i3c_hci_i2c_xfers(struct i2c_dev_desc *dev, 
	DECLARE_COMPLETION_ONSTACK(done);

	int i, last, ret = 0;



	DBG("nxfers = %d", nxfers);

	dev_dbg(&hci->master.dev, "nxfers = %d", nxfers);



	xfer = hci_alloc_xfer(nxfers);

	if (!xfer)
@@ -587,7 +587,7 @@ static int i3c_hci_init(struct i3c_hci *hci) 
	}



	hci->caps = reg_read(HC_CAPABILITIES);

	DBG("caps = %#x", hci->caps);

	dev_dbg(&hci->master.dev, "caps = %#x", hci->caps);



	size_in_dwords = hci->version_major < 1 ||

			 (hci->version_major == 1 && hci->version_minor < 1);

drivers/i3c/master/mipi-i3c-hci/dma.c

+9 −6
Original line number Diff line number Diff line
@@ -248,7 +248,8 @@ static int hci_dma_init(struct i3c_hci *hci) 
		regval = rh_reg_read(CR_SETUP);

		rh->xfer_struct_sz = FIELD_GET(CR_XFER_STRUCT_SIZE, regval);

		rh->resp_struct_sz = FIELD_GET(CR_RESP_STRUCT_SIZE, regval);

		DBG("xfer_struct_sz = %d, resp_struct_sz = %d",

		dev_dbg(&hci->master.dev,

			"xfer_struct_sz = %d, resp_struct_sz = %d",

			rh->xfer_struct_sz, rh->resp_struct_sz);

		xfers_sz = rh->xfer_struct_sz * rh->xfer_entries;

		resps_sz = rh->resp_struct_sz * rh->xfer_entries;
@@ -523,11 +524,11 @@ static void hci_dma_xfer_done(struct i3c_hci *hci, struct hci_rh_data *rh) 
		ring_resp = rh->resp + rh->resp_struct_sz * done_ptr;

		resp = *ring_resp;

		tid = RESP_TID(resp);

		DBG("resp = 0x%08x", resp);

		dev_dbg(&hci->master.dev, "resp = 0x%08x", resp);



		xfer = rh->src_xfers[done_ptr];

		if (!xfer) {

			DBG("orphaned ring entry");

			dev_dbg(&hci->master.dev, "orphaned ring entry");

		} else {

			hci_dma_unmap_xfer(hci, xfer, 1);

			xfer->ring_entry = -1;
@@ -630,7 +631,7 @@ static void hci_dma_process_ibi(struct i3c_hci *hci, struct hci_rh_data *rh) 


		ring_ibi_status = rh->ibi_status + rh->ibi_status_sz * ptr;

		ibi_status = *ring_ibi_status;

		DBG("status = %#x", ibi_status);

		dev_dbg(&hci->master.dev, "status = %#x", ibi_status);



		if (ibi_status_error) {

			/* we no longer care */
@@ -658,7 +659,9 @@ static void hci_dma_process_ibi(struct i3c_hci *hci, struct hci_rh_data *rh) 


	if (last_ptr == -1) {

		/* this IBI sequence is not yet complete */

		DBG("no LAST_STATUS available (e=%d d=%d)", enq_ptr, deq_ptr);

		dev_dbg(&hci->master.dev,

			"no LAST_STATUS available (e=%d d=%d)",

			enq_ptr, deq_ptr);

		return;

	}

	deq_ptr = last_ptr + 1;

drivers/i3c/master/mipi-i3c-hci/ext_caps.c

+7 −4
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@ static int hci_extcap_hardware_id(struct i3c_hci *hci, void __iomem *base) 
	switch (hci->vendor_mipi_id) {

	case MIPI_VENDOR_NXP:

		hci->quirks |= HCI_QUIRK_RAW_CCC;

		DBG("raw CCC quirks set");

		dev_dbg(&hci->master.dev, "raw CCC quirks set");

		break;

	}
@@ -77,7 +77,8 @@ static int hci_extcap_xfer_modes(struct i3c_hci *hci, void __iomem *base) 
	for (index = 0; index < entries; index++) {

		u32 mode_entry = readl(base);



		DBG("mode %d: 0x%08x", index, mode_entry);

		dev_dbg(&hci->master.dev, "mode %d: 0x%08x",

			index, mode_entry);

		/* TODO: will be needed when I3C core does more than SDR */

		base += 4;

	}
@@ -97,7 +98,8 @@ static int hci_extcap_xfer_rates(struct i3c_hci *hci, void __iomem *base) 
	dev_info(&hci->master.dev, "available data rates:\n");

	for (index = 0; index < entries; index++) {

		rate_entry = readl(base);

		DBG("entry %d: 0x%08x", index, rate_entry);

		dev_dbg(&hci->master.dev, "entry %d: 0x%08x",

			index, rate_entry);

		rate = FIELD_GET(XFERRATE_ACTUAL_RATE_KHZ, rate_entry);

		rate_id = FIELD_GET(XFERRATE_RATE_ID, rate_entry);

		mode_id = FIELD_GET(XFERRATE_MODE_ID, rate_entry);
@@ -268,7 +270,8 @@ int i3c_hci_parse_ext_caps(struct i3c_hci *hci) 
		cap_header = readl(curr_cap);

		cap_id = FIELD_GET(CAP_HEADER_ID, cap_header);

		cap_length = FIELD_GET(CAP_HEADER_LENGTH, cap_header);

		DBG("id=0x%02x length=%d", cap_id, cap_length);

		dev_dbg(&hci->master.dev, "id=0x%02x length=%d",

			cap_id, cap_length);

		if (!cap_length)

			break;

		if (curr_cap + cap_length * 4 >= end) {