Merge tag 'v7.0-rc7' into char-misc-next

Alan Cox <alan@lxorguk.ukuu.org.uk>

Alan Cox <root@hraefn.swansea.linux.org.uk>

Alyssa Rosenzweig <alyssa@rosenzweig.io>

Askar Safin <safinaskar@gmail.com>

Christoph Hellwig <hch@lst.de>

Jeff Kirsher <jeffrey.t.kirsher@intel.com>

Marc Gonzalez <marc.w.gonzalez@free.fr>

Hans Verkuil <hverkuil@kernel.org> <hansverk@cisco.com>

Hao Ge <hao.ge@linux.dev> <gehao@kylinos.cn>

Harry Yoo <harry.yoo@oracle.com> <42.hyeyoo@gmail.com>

Harry Yoo <harry@kernel.org> <harry.yoo@oracle.com>

Heiko Carstens <hca@linux.ibm.com> <h.carstens@de.ibm.com>

Heiko Carstens <hca@linux.ibm.com> <heiko.carstens@de.ibm.com>

Heiko Stuebner <heiko@sntech.de> <heiko.stuebner@bqreaders.com>

Herbert Xu <herbert@gondor.apana.org.au>

Huacai Chen <chenhuacai@kernel.org> <chenhc@lemote.com>

Huacai Chen <chenhuacai@kernel.org> <chenhuacai@loongson.cn>

Ignat Korchagin <ignat@linux.win> <ignat@cloudflare.com>

Ike Panhc <ikepanhc@gmail.com> <ike.pan@canonical.com>

J. Bruce Fields <bfields@fieldses.org> <bfields@redhat.com>

J. Bruce Fields <bfields@fieldses.org> <bfields@citi.umich.edu>

Morten Welinder <welinder@anemone.rentec.com>

Morten Welinder <welinder@darter.rentec.com>

Morten Welinder <welinder@troll.com>

Muhammad Usama Anjum <usama.anjum@arm.com> <usama.anjum@collabora.com>

Mukesh Ojha <quic_mojha@quicinc.com> <mojha@codeaurora.org>

Muna Sinada <quic_msinada@quicinc.com> <msinada@codeaurora.org>

Murali Nalajala <quic_mnalajal@quicinc.com> <mnalajal@codeaurora.org>

the error message to the Root Port. Please refer to PCIe specs for other

fields.

The 'TLP Header' is the prefix/header of the TLP that caused the error

in raw hex format. To decode the TLP Header into human-readable form

one may use tlp-tool:

https://github.com/mmpg-x86/tlp-tool

Example usage::

  curl -L https://git.kernel.org/linus/2ca1c94ce0b6 | rtlp-tool --aer

AER Ratelimits

--------------

DMA_ATTR_MMIO will not perform any cache flushing. The address

provided must never be mapped cacheable into the CPU.

DMA_ATTR_CPU_CACHE_CLEAN

------------------------

This attribute indicates the CPU will not dirty any cacheline overlapping this

DMA_FROM_DEVICE/DMA_BIDIRECTIONAL buffer while it is mapped. This allows

multiple small buffers to safely share a cacheline without risk of data

corruption, suppressing DMA debug warnings about overlapping mappings.

All mappings sharing a cacheline should have this attribute.

DMA_ATTR_DEBUGGING_IGNORE_CACHELINES

------------------------------------

This attribute indicates that CPU cache lines may overlap for buffers mapped

with DMA_FROM_DEVICE or DMA_BIDIRECTIONAL.

Such overlap may occur when callers map multiple small buffers that reside

within the same cache line. In this case, callers must guarantee that the CPU

will not dirty these cache lines after the mappings are established. When this

condition is met, multiple buffers can safely share a cache line without risking

data corruption.

All mappings that share a cache line must set this attribute to suppress DMA

debug warnings about overlapping mappings.

DMA_ATTR_REQUIRE_COHERENT

-------------------------

DMA mapping requests with the DMA_ATTR_REQUIRE_COHERENT fail on any

system where SWIOTLB or cache management is required. This should only

be used to support uAPI designs that require continuous HW DMA

coherence with userspace processes, for example RDMA and DRM. At a

minimum the memory being mapped must be userspace memory from

pin_user_pages() or similar.

Drivers should consider using dma_mmap_pages() instead of this

interface when building their uAPIs, when possible.

It must never be used in an in-kernel driver that only works with

kernel memory.

- ``--list_tests_attr``: If set, lists all tests that will be run and all of their

  attributes.

- ``--list_suites``: If set, lists all suites that will be run.

Command-line completion

==============================