Commit a526eeef authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Neil Armstrong
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arm64: dts: amlogic: gx: switch to the new PWM controller binding



Use the new PWM controller binding which now relies on passing all
clock inputs available on the SoC (instead of passing the "wanted"
clock input for a given board).

Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241227212514.1376682-4-martin.blumenstingl@googlemail.com


Signed-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
parent 2014c95a
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+0 −6
Original line number Diff line number Diff line
@@ -345,24 +345,18 @@ rtc: rtc@51 {
&pwm_AO_ab {
	pinctrl-0 = <&pwm_ao_a_3_pins>;
	pinctrl-names = "default";
	clocks = <&clkc CLKID_FCLK_DIV4>;
	clock-names = "clkin0";
	status = "okay";
};

&pwm_ab {
	pinctrl-0 = <&pwm_b_pins>;
	pinctrl-names = "default";
	clocks = <&clkc CLKID_FCLK_DIV4>;
	clock-names = "clkin0";
	status = "okay";
};

&pwm_ef {
	pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
	pinctrl-names = "default";
	clocks = <&clkc CLKID_FCLK_DIV4>;
	clock-names = "clkin0";
	status = "okay";
};

+0 −2
Original line number Diff line number Diff line
@@ -240,8 +240,6 @@ &pwm_ef {
	status = "okay";
	pinctrl-0 = <&pwm_e_pins>;
	pinctrl-names = "default";
	clocks = <&clkc CLKID_FCLK_DIV4>;
	clock-names = "clkin0";
};

&saradc {
+4 −4
Original line number Diff line number Diff line
@@ -329,14 +329,14 @@ i2c_A: i2c@8500 {
			};

			pwm_ab: pwm@8550 {
				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
				reg = <0x0 0x08550 0x0 0x10>;
				#pwm-cells = <3>;
				status = "disabled";
			};

			pwm_cd: pwm@8650 {
				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
				reg = <0x0 0x08650 0x0 0x10>;
				#pwm-cells = <3>;
				status = "disabled";
@@ -351,7 +351,7 @@ saradc: adc@8680 {
			};

			pwm_ef: pwm@86c0 {
				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
				reg = <0x0 0x086c0 0x0 0x10>;
				#pwm-cells = <3>;
				status = "disabled";
@@ -498,7 +498,7 @@ i2c_AO: i2c@500 {
			};

			pwm_AO_ab: pwm@550 {
				compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
				compatible = "amlogic,meson-gxbb-pwm-v2", "amlogic,meson8-pwm-v2";
				reg = <0x0 0x00550 0x0 0x10>;
				#pwm-cells = <3>;
				status = "disabled";
+0 −2
Original line number Diff line number Diff line
@@ -298,8 +298,6 @@ &pwm_ef {
	status = "okay";
	pinctrl-0 = <&pwm_e_pins>;
	pinctrl-names = "default";
	clocks = <&clkc CLKID_FCLK_DIV4>;
	clock-names = "clkin0";
};

&saradc {
+0 −2
Original line number Diff line number Diff line
@@ -241,8 +241,6 @@ &pwm_ef {
	status = "okay";
	pinctrl-0 = <&pwm_e_pins>;
	pinctrl-names = "default";
	clocks = <&clkc CLKID_FCLK_DIV4>;
	clock-names = "clkin0";
};

/* Wireless SDIO Module */
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