Commit a5c69d45 authored by Jacob Keller's avatar Jacob Keller Committed by Tony Nguyen
Browse files

ice: check low latency PHY timer update firmware capability 



Newer versions of firmware support programming the PHY timer via the low
latency interface exposed over REG_LL_PROXY_L and REG_LL_PROXY_H. Add
support for checking the device capabilities for this feature.

Co-developed-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: default avatarJacob Keller <jacob.e.keller@intel.com>
Reviewed-by: default avatarMilena Olech <milena.olech@intel.com>
Signed-off-by: default avatarAnton Nadezhdin <anton.nadezhdin@intel.com>
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent 50327223

drivers/net/ethernet/intel/ice/ice_common.c

+3 −0
Original line number Diff line number Diff line
@@ -2641,6 +2641,7 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, 


	info->ts_ll_read = ((number & ICE_TS_LL_TX_TS_READ_M) != 0);

	info->ts_ll_int_read = ((number & ICE_TS_LL_TX_TS_INT_READ_M) != 0);

	info->ll_phy_tmr_update = ((number & ICE_TS_LL_PHY_TMR_UPDATE_M) != 0);



	info->ena_ports = logical_id;

	info->tmr_own_map = phys_id;
@@ -2663,6 +2664,8 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, 
		  info->ts_ll_read);

	ice_debug(hw, ICE_DBG_INIT, "dev caps: ts_ll_int_read = %u\n",

		  info->ts_ll_int_read);

	ice_debug(hw, ICE_DBG_INIT, "dev caps: ll_phy_tmr_update = %u\n",

		  info->ll_phy_tmr_update);

	ice_debug(hw, ICE_DBG_INIT, "dev caps: ieee_1588 ena_ports = %u\n",

		  info->ena_ports);

	ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr_own_map = %u\n",

drivers/net/ethernet/intel/ice/ice_type.h

+2 −0
Original line number Diff line number Diff line
@@ -369,6 +369,7 @@ struct ice_ts_func_info { 
#define ICE_TS_TMR1_ENA_M		BIT(26)

#define ICE_TS_LL_TX_TS_READ_M		BIT(28)

#define ICE_TS_LL_TX_TS_INT_READ_M	BIT(29)

#define ICE_TS_LL_PHY_TMR_UPDATE_M	BIT(30)



struct ice_ts_dev_info {

	/* Device specific info */
@@ -383,6 +384,7 @@ struct ice_ts_dev_info { 
	u8 tmr1_ena;

	u8 ts_ll_read;

	u8 ts_ll_int_read;

	u8 ll_phy_tmr_update;

};



#define ICE_NAC_TOPO_PRIMARY_M	BIT(0)