Commit a5dff51e authored by Haibo Chen's avatar Haibo Chen Committed by Pratyush Yadav
Browse files

mtd: spi-nor: micron-st: add mt35xu01gbba support 

mt35xu01gbba is similar with mt35xu512aba, but with two dies.
mt35xu01gbba has SFDP and support 8D-8D-8D mode, but SFDP
lack SNOR_F_IO_MODE_EN_VOLATILE, so add this fixup flags here.
Besides, mt35xu01gbba do not support chip erase, but support
die erase, so add that in late_init().

Link: https://datasheet.octopart.com/MT35XU02GCBA1G12-0AAT-Micron-datasheet-138896808.pdf


Signed-off-by: default avatarHaibo Chen <haibo.chen@nxp.com>
Reviewed-by: default avatarTudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: default avatarPratyush Yadav <pratyush@kernel.org>
parent 44dd635c

drivers/mtd/spi-nor/micron-st.c

+11 −0
Original line number Diff line number Diff line
@@ -185,6 +185,11 @@ static const struct spi_nor_fixups mt35xu512aba_fixups = { 
	.post_sfdp = mt35xu512aba_post_sfdp_fixup,

};



static const struct spi_nor_fixups mt35xu01gbba_fixups = {

	.post_sfdp = mt35xu512aba_post_sfdp_fixup,

	.late_init = micron_st_nor_two_die_late_init,

};



static const struct flash_info micron_nor_parts[] = {

	{

		/* MT35XU512ABA */
@@ -192,6 +197,12 @@ static const struct flash_info micron_nor_parts[] = { 
		.mfr_flags = USE_FSR,

		.fixup_flags = SPI_NOR_IO_MODE_EN_VOLATILE,

		.fixups = &mt35xu512aba_fixups,

	}, {

		/* MT35XU01GBBA */

		.id = SNOR_ID(0x2c, 0x5b, 0x1b),

		.mfr_flags = USE_FSR,

		.fixup_flags = SPI_NOR_IO_MODE_EN_VOLATILE,

		.fixups = &mt35xu01gbba_fixups,

	}, {

		.id = SNOR_ID(0x2c, 0x5b, 0x1c),

		.name = "mt35xu02g",