Commit a5ec9a44 authored by Abhinav Kumar's avatar Abhinav Kumar Committed by Dmitry Baryshkov
Browse files

drm/msm/dpu: add cdm blocks to sc7280 dpu_hw_catalog 



Add CDM blocks to the sc7280 dpu_hw_catalog to support
YUV format output from writeback block.

changes in v3:
	- change the comment from sub-blk to clk for CDM

changes in v2:
	- remove explicit zero assignment for features
	- move sc7280_cdm to dpu_hw_catalog from the sc7280
	  catalog file as its definition can be re-used

Signed-off-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/571818/
Link: https://lore.kernel.org/r/20231212205254.12422-6-quic_abhinavk@quicinc.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 9c4998ef

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h

+1 −0
Original line number Diff line number Diff line
@@ -248,6 +248,7 @@ const struct dpu_mdss_cfg dpu_sc7280_cfg = { 
	.mdss_ver = &sc7280_mdss_ver,

	.caps = &sc7280_dpu_caps,

	.mdp = &sc7280_mdp,

	.cdm = &sc7280_cdm,

	.ctl_count = ARRAY_SIZE(sc7280_ctl),

	.ctl = sc7280_ctl,

	.sspp_count = ARRAY_SIZE(sc7280_sspp),

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+10 −0
Original line number Diff line number Diff line
@@ -426,6 +426,16 @@ static const struct dpu_dsc_sub_blks dsc_sblk_1 = { 
	.ctl = {.name = "ctl", .base = 0xF80, .len = 0x10},

};



/*************************************************************

 * CDM block config

 *************************************************************/

static const struct dpu_cdm_cfg sc7280_cdm = {

	.name = "cdm_0",

	.id = CDM_0,

	.len = 0x228,

	.base = 0x79200,

};



/*************************************************************

 * VBIF sub blocks config

 *************************************************************/

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

+13 −0
Original line number Diff line number Diff line
@@ -682,6 +682,17 @@ struct dpu_vbif_cfg { 
	u32 memtype[MAX_XIN_COUNT];

};



/**

 * struct dpu_cdm_cfg - information of chroma down blocks

 * @name               string name for debug purposes

 * @id                 enum identifying this block

 * @base               register offset of this block

 * @features           bit mask identifying sub-blocks/features

 */

struct dpu_cdm_cfg {

	DPU_HW_BLK_INFO;

};



/**

 * Define CDP use cases

 * @DPU_PERF_CDP_UDAGE_RT: real-time use cases
@@ -805,6 +816,8 @@ struct dpu_mdss_cfg { 
	u32 wb_count;

	const struct dpu_wb_cfg *wb;



	const struct dpu_cdm_cfg *cdm;



	u32 ad_count;



	u32 dspp_count;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h

+5 −0
Original line number Diff line number Diff line
@@ -185,6 +185,11 @@ enum dpu_dsc { 
	DSC_MAX

};



enum dpu_cdm {

	CDM_0 = 1,

	CDM_MAX

};



enum dpu_pingpong {

	PINGPONG_NONE,

	PINGPONG_0,