Unverified Commit a5edc510 authored by Alexandre Ghiti's avatar Alexandre Ghiti
Browse files

Merge patch series "Support SSTC while PM operations" 

Nick Hu <nick.hu@sifive.com> says:

When the cpu is going to be hotplug, stop the stimecmp to prevent pending
interrupt.
When the cpu is going to be suspended, save the stimecmp before entering
the suspend state and restore it in the resume path.

* patches from https://lore.kernel.org/r/20250219114135.27764-1-nick.hu@sifive.com:
  clocksource/drivers/timer-riscv: Stop stimecmp when cpu hotplug
  riscv: Add stimecmp save and restore

Link: https://lore.kernel.org/r/20250219114135.27764-1-nick.hu@sifive.com


Signed-off-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
parents 7f238b12 70c93b02

arch/riscv/include/asm/suspend.h

+4 −0
Original line number Diff line number Diff line
@@ -18,6 +18,10 @@ struct suspend_context { 
	unsigned long ie;

#ifdef CONFIG_MMU

	unsigned long satp;

	unsigned long stimecmp;

#if __riscv_xlen < 64

	unsigned long stimecmph;

#endif

#endif

};

arch/riscv/kernel/suspend.c

+14 −0
Original line number Diff line number Diff line
@@ -30,6 +30,13 @@ void suspend_save_csrs(struct suspend_context *context) 
	 */



#ifdef CONFIG_MMU

	if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC)) {

		context->stimecmp = csr_read(CSR_STIMECMP);

#if __riscv_xlen < 64

		context->stimecmph = csr_read(CSR_STIMECMPH);

#endif

	}



	context->satp = csr_read(CSR_SATP);

#endif

}
@@ -43,6 +50,13 @@ void suspend_restore_csrs(struct suspend_context *context) 
	csr_write(CSR_IE, context->ie);



#ifdef CONFIG_MMU

	if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC)) {

		csr_write(CSR_STIMECMP, context->stimecmp);

#if __riscv_xlen < 64

		csr_write(CSR_STIMECMPH, context->stimecmph);

#endif

	}



	csr_write(CSR_SATP, context->satp);

#endif

}

drivers/clocksource/timer-riscv.c

+6 −0
Original line number Diff line number Diff line
@@ -126,7 +126,13 @@ static int riscv_timer_starting_cpu(unsigned int cpu) 


static int riscv_timer_dying_cpu(unsigned int cpu)

{

	/*

	 * Stop the timer when the cpu is going to be offline otherwise

	 * the timer interrupt may be pending while performing power-down.

	 */

	riscv_clock_event_stop();

	disable_percpu_irq(riscv_clock_event_irq);



	return 0;

}