Unverified Commit a61dae11 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'riscv-soc-fixes-for-v6.13-rc4' of... 

Merge tag 'riscv-soc-fixes-for-v6.13-rc4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux

 into arm/fixes

RISC-V soc driver fixes for v6.13-rc4

A single fix for the Auto Update driver, where a mistake in array
indexing (accessing as a u32 rather than a u8) caused the driver to read
the wrong feature disable bits.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>

* tag 'riscv-soc-fixes-for-v6.13-rc4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  firmware: microchip: fix UL_IAP lock check in mpfs_auto_update_state()

Link: https://lore.kernel.org/r/20241218-suffrage-unfazed-fa0113072a42@spud


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents f5782810 48808b55

drivers/firmware/microchip/mpfs-auto-update.c

+2 −2
Original line number Diff line number Diff line
@@ -402,10 +402,10 @@ static int mpfs_auto_update_available(struct mpfs_auto_update_priv *priv) 
		return -EIO;



	/*

	 * Bit 5 of byte 1 is "UL_Auto Update" & if it is set, Auto Update is

	 * Bit 5 of byte 1 is "UL_IAP" & if it is set, Auto Update is

	 * not possible.

	 */

	if (response_msg[1] & AUTO_UPDATE_FEATURE_ENABLED)

	if ((((u8 *)response_msg)[1] & AUTO_UPDATE_FEATURE_ENABLED))

		return -EPERM;



	return 0;