Commit a6afc96b authored by Dharma Balasubiramani's avatar Dharma Balasubiramani Committed by Claudiu Beznea
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dt-bindings: atmel-sysreg: add sama7d65 RAM and PIT

parent 2140e55a
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+8 −6
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ PIT Timer required properties:
PIT64B Timer required properties:
- compatible: Should be "microchip,sam9x60-pit64b" or
			"microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b"
			"microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b"
- reg: Should contain registers location and length
- interrupts: Should contain interrupt for PIT64B timer
- clocks: Should contain the available clock sources for PIT64B timer.
@@ -27,12 +28,13 @@ Its subnodes can be:
- watchdog: compatible should be "atmel,at91rm9200-wdt"

RAMC SDRAM/DDR Controller required properties:
- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
			"atmel,at91sam9260-sdramc",
			"atmel,at91sam9g45-ddramc",
			"atmel,sama5d3-ddramc",
			"microchip,sam9x60-ddramc",
			"microchip,sama7g5-uddrc",
- compatible: Should be "atmel,at91rm9200-sdramc", "syscon" or
			"atmel,at91sam9260-sdramc" or
			"atmel,at91sam9g45-ddramc" or
			"atmel,sama5d3-ddramc" or
			"microchip,sam9x60-ddramc" or
			"microchip,sama7g5-uddrc" or
			"microchip,sama7d65-uddrc", "microchip,sama7g5-uddrc" or
			"microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc".
- reg: Should contain registers location and length