Commit a7687b29 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'net-add-1600gbps-1-6t-link-mode-support' 

Tariq Toukan says:

====================
net: Add 1600Gbps (1.6T) link mode support

This series by Yael adds 1600Gbps (1.6T) link mode support.
See detailed description by Yael below.
====================

Link: https://patch.msgid.link/1763585297-1243980-1-git-send-email-tariqt@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 8b4e023d 5fb9a0b8

drivers/net/bonding/bond_3ad.c

+9 −0
Original line number Diff line number Diff line
@@ -76,6 +76,7 @@ enum ad_link_speed_type { 
	AD_LINK_SPEED_200000MBPS,

	AD_LINK_SPEED_400000MBPS,

	AD_LINK_SPEED_800000MBPS,

	AD_LINK_SPEED_1600000MBPS,

};



/* compare MAC addresses */
@@ -300,6 +301,7 @@ static inline int __check_agg_selection_timer(struct port *port) 
 *     %AD_LINK_SPEED_200000MBPS

 *     %AD_LINK_SPEED_400000MBPS

 *     %AD_LINK_SPEED_800000MBPS

 *     %AD_LINK_SPEED_1600000MBPS

 */

static u16 __get_link_speed(struct port *port)

{
@@ -379,6 +381,10 @@ static u16 __get_link_speed(struct port *port) 
			speed = AD_LINK_SPEED_800000MBPS;

			break;



		case SPEED_1600000:

			speed = AD_LINK_SPEED_1600000MBPS;

			break;



		default:

			/* unknown speed value from ethtool. shouldn't happen */

			if (slave->speed != SPEED_UNKNOWN)
@@ -822,6 +828,9 @@ static u32 __get_agg_bandwidth(struct aggregator *aggregator) 
		case AD_LINK_SPEED_800000MBPS:

			bandwidth = nports * 800000;

			break;

		case AD_LINK_SPEED_1600000MBPS:

			bandwidth = nports * 1600000;

			break;

		default:

			bandwidth = 0; /* to silence the compiler */

		}

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

+5 −0
Original line number Diff line number Diff line
@@ -261,6 +261,11 @@ void mlx5e_build_ptys2ethtool_map(void) 
				       ETHTOOL_LINK_MODE_800000baseDR4_2_Full_BIT,

				       ETHTOOL_LINK_MODE_800000baseSR4_Full_BIT,

				       ETHTOOL_LINK_MODE_800000baseVR4_Full_BIT);

	MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1600TAUI_8_1600TBASE_CR8_KR8, ext,

				       ETHTOOL_LINK_MODE_1600000baseCR8_Full_BIT,

				       ETHTOOL_LINK_MODE_1600000baseKR8_Full_BIT,

				       ETHTOOL_LINK_MODE_1600000baseDR8_Full_BIT,

				       ETHTOOL_LINK_MODE_1600000baseDR8_2_Full_BIT);

}



static void mlx5e_ethtool_get_speed_arr(bool ext,

drivers/net/ethernet/mellanox/mlx5/core/port.c

+1 −0
Original line number Diff line number Diff line
@@ -1108,6 +1108,7 @@ mlx5e_ext_link_info[MLX5E_EXT_LINK_MODES_NUMBER] = { 
	[MLX5E_200GAUI_1_200GBASE_CR1_KR1]	= {.speed = 200000, .lanes = 1},

	[MLX5E_400GAUI_2_400GBASE_CR2_KR2]	= {.speed = 400000, .lanes = 2},

	[MLX5E_800GAUI_4_800GBASE_CR4_KR4]	= {.speed = 800000, .lanes = 4},

	[MLX5E_1600TAUI_8_1600TBASE_CR8_KR8]	= {.speed = 1600000, .lanes = 8},

};



int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext,

drivers/net/phy/phy-caps.h

+1 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ enum { 
	LINK_CAPA_200000FD,

	LINK_CAPA_400000FD,

	LINK_CAPA_800000FD,

	LINK_CAPA_1600000FD,



	__LINK_CAPA_MAX,

};

drivers/net/phy/phy-core.c

+3 −1
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ 
 */

const char *phy_speed_to_str(int speed)

{

	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 121,

	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 125,

		"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "

		"If a speed or mode has been added please update phy_speed_to_str "

		"and the PHY settings array.\n");
@@ -55,6 +55,8 @@ const char *phy_speed_to_str(int speed) 
		return "400Gbps";

	case SPEED_800000:

		return "800Gbps";

	case SPEED_1600000:

		return "1600Gbps";

	case SPEED_UNKNOWN:

		return "Unknown";

	default: