Commit a79d3845 authored by Ben Skeggs's avatar Ben Skeggs Committed by Lyude Paul
Browse files

drm/nouveau/mmu/gp100: Remove unused/broken support for compression 



From GP100 onwards it's not possible to initialise comptag RAM without
PMU firmware, which nouveau has no support for.

As such, this code is essentially a no-op and will always revert to the
equivalent non-compressed kind due to comptag allocation failure.  It's
also broken for the needs of VM_BIND/Vulkan.

Remove the code entirely to make way for supporting compression on GPUs
that support GSM-RM.

Signed-off-by: default avatarBen Skeggs <bskeggs@nvidia.com>
Signed-off-by: default avatarMohamed Ahmed <mohamedahmedegypt2001@gmail.com>
Signed-off-by: default avatarMary Guillemard <mary@mary.zone>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
Reviewed-by: default avatarJames Jones <jajones@nvidia.com>
Signed-off-by: default avatarLyude Paul <lyude@redhat.com>
Link: https://patch.msgid.link/20251110-nouveau-compv6-v6-3-83b05475f57c@mary.zone
parent c488a94e

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c

+4 −35
Original line number Diff line number Diff line
@@ -21,9 +21,7 @@ 
 */

#include "vmm.h"



#include <core/client.h>

#include <subdev/fb.h>

#include <subdev/ltc.h>

#include <subdev/timer.h>

#include <engine/gr.h>
@@ -117,8 +115,6 @@ gp100_vmm_pgt_pte(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt, 
{

	u64 data = (addr >> 4) | map->type;



	map->type += ptes * map->ctag;



	while (ptes--) {

		VMM_WO064(pt, vmm, ptei++ * 8, data);

		data += map->next;
@@ -142,7 +138,6 @@ gp100_vmm_pgt_dma(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt, 
		while (ptes--) {

			const u64 data = (*map->dma++ >> 4) | map->type;

			VMM_WO064(pt, vmm, ptei++ * 8, data);

			map->type += map->ctag;

		}

		nvkm_done(pt->memory);

		return;
@@ -200,8 +195,6 @@ gp100_vmm_pd0_pte(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt, 
{

	u64 data = (addr >> 4) | map->type;



	map->type += ptes * map->ctag;



	while (ptes--) {

		VMM_WO128(pt, vmm, ptei++ * 0x10, data, 0ULL);

		data += map->next;
@@ -411,8 +404,6 @@ gp100_vmm_valid(struct nvkm_vmm *vmm, void *argv, u32 argc, 
		struct gp100_vmm_map_vn vn;

		struct gp100_vmm_map_v0 v0;

	} *args = argv;

	struct nvkm_device *device = vmm->mmu->subdev.device;

	struct nvkm_memory *memory = map->memory;

	u8  kind, kind_inv, priv, ro, vol;

	int kindn, aper, ret = -ENOSYS;

	const u8 *kindm;
@@ -450,31 +441,9 @@ gp100_vmm_valid(struct nvkm_vmm *vmm, void *argv, u32 argc, 
	}



	if (kindm[kind] != kind) {

		u64 tags = nvkm_memory_size(memory) >> 16;

		if (aper != 0 || !(page->type & NVKM_VMM_PAGE_COMP)) {

			VMM_DEBUG(vmm, "comp %d %02x", aper, page->type);

			return -EINVAL;

		}



		if (!map->no_comp) {

			ret = nvkm_memory_tags_get(memory, device, tags,

						   nvkm_ltc_tags_clear,

						   &map->tags);

			if (ret) {

				VMM_DEBUG(vmm, "comp %d", ret);

				return ret;

			}

		}



		if (!map->no_comp && map->tags->mn) {

			tags = map->tags->mn->offset + (map->offset >> 16);

			map->ctag |= ((1ULL << page->shift) >> 16) << 36;

			map->type |= tags << 36;

			map->next |= map->ctag;

		} else {

		/* Revert to non-compressed kind. */

		kind = kindm[kind];

	}

	}



	map->type |= BIT(0);

	map->type |= (u64)aper << 1;
@@ -592,8 +561,8 @@ gp100_vmm = { 
		{ 47, &gp100_vmm_desc_16[4], NVKM_VMM_PAGE_Sxxx },

		{ 38, &gp100_vmm_desc_16[3], NVKM_VMM_PAGE_Sxxx },

		{ 29, &gp100_vmm_desc_16[2], NVKM_VMM_PAGE_Sxxx },

		{ 21, &gp100_vmm_desc_16[1], NVKM_VMM_PAGE_SVxC },

		{ 16, &gp100_vmm_desc_16[0], NVKM_VMM_PAGE_SVxC },

		{ 21, &gp100_vmm_desc_16[1], NVKM_VMM_PAGE_SVxx },

		{ 16, &gp100_vmm_desc_16[0], NVKM_VMM_PAGE_SVxx },

		{ 12, &gp100_vmm_desc_12[0], NVKM_VMM_PAGE_SVHx },

		{}

	}

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp10b.c

+2 −2
Original line number Diff line number Diff line
@@ -34,8 +34,8 @@ gp10b_vmm = { 
		{ 47, &gp100_vmm_desc_16[4], NVKM_VMM_PAGE_Sxxx },

		{ 38, &gp100_vmm_desc_16[3], NVKM_VMM_PAGE_Sxxx },

		{ 29, &gp100_vmm_desc_16[2], NVKM_VMM_PAGE_Sxxx },

		{ 21, &gp100_vmm_desc_16[1], NVKM_VMM_PAGE_SxHC },

		{ 16, &gp100_vmm_desc_16[0], NVKM_VMM_PAGE_SxHC },

		{ 21, &gp100_vmm_desc_16[1], NVKM_VMM_PAGE_SxHx },

		{ 16, &gp100_vmm_desc_16[0], NVKM_VMM_PAGE_SxHx },

		{ 12, &gp100_vmm_desc_12[0], NVKM_VMM_PAGE_SxHx },

		{}

	}