Commit a7b2aff3 authored by Vasant Hegde's avatar Vasant Hegde Committed by Joerg Roedel
Browse files

iommu/amd: Rearrange device flush code 



Consolidate all flush related code in one place so that its easy
to maintain.

No functional changes intended.

Signed-off-by: default avatarVasant Hegde <vasant.hegde@amd.com>
Reviewed-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20240205115615.6053-16-vasant.hegde@amd.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 02b99025

drivers/iommu/amd/iommu.c

+43 −49
Original line number Diff line number Diff line
@@ -1605,6 +1605,49 @@ static void domain_flush_devices(struct protection_domain *domain) 
		device_flush_dte(dev_data);

}



static void update_device_table(struct protection_domain *domain)

{

	struct iommu_dev_data *dev_data;



	list_for_each_entry(dev_data, &domain->dev_list, list) {

		struct amd_iommu *iommu = rlookup_amd_iommu(dev_data->dev);



		set_dte_entry(iommu, dev_data);

		clone_aliases(iommu, dev_data->dev);

	}

}



void amd_iommu_update_and_flush_device_table(struct protection_domain *domain)

{

	update_device_table(domain);

	domain_flush_devices(domain);

}



void amd_iommu_domain_update(struct protection_domain *domain)

{

	/* Update device table */

	amd_iommu_update_and_flush_device_table(domain);



	/* Flush domain TLB(s) and wait for completion */

	amd_iommu_domain_flush_all(domain);

}



int amd_iommu_complete_ppr(struct pci_dev *pdev, u32 pasid,

			   int status, int tag)

{

	struct iommu_dev_data *dev_data;

	struct amd_iommu *iommu;

	struct iommu_cmd cmd;



	dev_data = dev_iommu_priv_get(&pdev->dev);

	iommu    = get_amd_iommu_from_dev(&pdev->dev);



	build_complete_ppr(&cmd, dev_data->devid, pasid, status,

			   tag, dev_data->pri_tlp);



	return iommu_queue_command(iommu, &cmd);

}



/****************************************************************************

 *

 * The next functions belong to the domain allocation. A domain is
@@ -2116,39 +2159,6 @@ static struct iommu_group *amd_iommu_device_group(struct device *dev) 
	return acpihid_device_group(dev);

}



/*****************************************************************************

 *

 * The next functions belong to the dma_ops mapping/unmapping code.

 *

 *****************************************************************************/



static void update_device_table(struct protection_domain *domain)

{

	struct iommu_dev_data *dev_data;



	list_for_each_entry(dev_data, &domain->dev_list, list) {

		struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data);



		set_dte_entry(iommu, dev_data);

		clone_aliases(iommu, dev_data->dev);

	}

}



void amd_iommu_update_and_flush_device_table(struct protection_domain *domain)

{

	update_device_table(domain);

	domain_flush_devices(domain);

}



void amd_iommu_domain_update(struct protection_domain *domain)

{

	/* Update device table */

	amd_iommu_update_and_flush_device_table(domain);



	/* Flush domain TLB(s) and wait for completion */

	amd_iommu_domain_flush_all(domain);

}



/*****************************************************************************

 *

 * The following functions belong to the exported interface of AMD IOMMU
@@ -2747,22 +2757,6 @@ const struct iommu_ops amd_iommu_ops = { 
	}

};



int amd_iommu_complete_ppr(struct pci_dev *pdev, u32 pasid,

			   int status, int tag)

{

	struct iommu_dev_data *dev_data;

	struct amd_iommu *iommu;

	struct iommu_cmd cmd;



	dev_data = dev_iommu_priv_get(&pdev->dev);

	iommu    = get_amd_iommu_from_dev(&pdev->dev);



	build_complete_ppr(&cmd, dev_data->devid, pasid, status,

			   tag, dev_data->pri_tlp);



	return iommu_queue_command(iommu, &cmd);

}



#ifdef CONFIG_IRQ_REMAP



/*****************************************************************************