Commit a7ef63db authored by Bharat Bhushan's avatar Bharat Bhushan Committed by David S. Miller
Browse files

octeontx2-af: Disable backpressure between CPT and NIX 



NIX can assert backpressure to CPT on the NIX<=>CPT link.
Keep the backpressure disabled for now. NIX block anyways
handles backpressure asserted by MAC due to PFC or flow
control pkts.

Signed-off-by: default avatarBharat Bhushan <bbhushan2@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c460b744

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+4 −0
Original line number Diff line number Diff line
@@ -313,6 +313,10 @@ M(NIX_BANDPROF_FREE, 0x801e, nix_bandprof_free, nix_bandprof_free_req, \ 
				msg_rsp)				    \

M(NIX_BANDPROF_GET_HWINFO, 0x801f, nix_bandprof_get_hwinfo, msg_req,		\

				nix_bandprof_get_hwinfo_rsp)		    \

M(NIX_CPT_BP_ENABLE,    0x8020, nix_cpt_bp_enable, nix_bp_cfg_req,	    \

				nix_bp_cfg_rsp)				    \

M(NIX_CPT_BP_DISABLE,   0x8021, nix_cpt_bp_disable, nix_bp_cfg_req,	    \

				msg_rsp)				\

M(NIX_READ_INLINE_IPSEC_CFG, 0x8023, nix_read_inline_ipsec_cfg,		\

				msg_req, nix_inline_ipsec_cfg)		\

M(NIX_MCAST_GRP_CREATE,	0x802b, nix_mcast_grp_create, nix_mcast_grp_create_req,	\

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

+58 −10
Original line number Diff line number Diff line
@@ -569,9 +569,17 @@ void rvu_nix_flr_free_bpids(struct rvu *rvu, u16 pcifunc) 
	mutex_unlock(&rvu->rsrc_lock);

}



int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu,

static u16 nix_get_channel(u16 chan, bool cpt_link)

{

	/* CPT channel for a given link channel is always

	 * assumed to be BIT(11) set in link channel.

	 */

	return cpt_link ? chan | BIT(11) : chan;

}



static int nix_bp_disable(struct rvu *rvu,

			  struct nix_bp_cfg_req *req,

				    struct msg_rsp *rsp)

			  struct msg_rsp *rsp, bool cpt_link)

{

	u16 pcifunc = req->hdr.pcifunc;

	int blkaddr, pf, type, err;
@@ -579,6 +587,7 @@ int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu, 
	struct rvu_pfvf *pfvf;

	struct nix_hw *nix_hw;

	struct nix_bp *bp;

	u16 chan_v;

	u64 cfg;



	pf = rvu_get_pf(pcifunc);
@@ -589,6 +598,9 @@ int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu, 
	if (is_sdp_pfvf(pcifunc))

		type = NIX_INTF_TYPE_SDP;



	if (cpt_link && !rvu->hw->cpt_links)

		return 0;



	pfvf = rvu_get_pfvf(rvu, pcifunc);

	err = nix_get_struct_ptrs(rvu, pcifunc, &nix_hw, &blkaddr);

	if (err)
@@ -597,8 +609,9 @@ int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu, 
	bp = &nix_hw->bp;

	chan_base = pfvf->rx_chan_base + req->chan_base;

	for (chan = chan_base; chan < (chan_base + req->chan_cnt); chan++) {

		cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan));

		rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan),

		chan_v = nix_get_channel(chan, cpt_link);

		cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v));

		rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v),

			    cfg & ~BIT_ULL(16));



		if (type == NIX_INTF_TYPE_LBK) {
@@ -617,6 +630,20 @@ int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu, 
	return 0;

}



int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu,

				    struct nix_bp_cfg_req *req,

				    struct msg_rsp *rsp)

{

	return nix_bp_disable(rvu, req, rsp, false);

}



int rvu_mbox_handler_nix_cpt_bp_disable(struct rvu *rvu,

					struct nix_bp_cfg_req *req,

					struct msg_rsp *rsp)

{

	return nix_bp_disable(rvu, req, rsp, true);

}



static int rvu_nix_get_bpid(struct rvu *rvu, struct nix_bp_cfg_req *req,

			    int type, int chan_id)

{
@@ -696,15 +723,17 @@ static int rvu_nix_get_bpid(struct rvu *rvu, struct nix_bp_cfg_req *req, 
	return bpid;

}



int rvu_mbox_handler_nix_bp_enable(struct rvu *rvu,

static int nix_bp_enable(struct rvu *rvu,

			 struct nix_bp_cfg_req *req,

				   struct nix_bp_cfg_rsp *rsp)

			 struct nix_bp_cfg_rsp *rsp,

			 bool cpt_link)

{

	int blkaddr, pf, type, chan_id = 0;

	u16 pcifunc = req->hdr.pcifunc;

	struct rvu_pfvf *pfvf;

	u16 chan_base, chan;

	s16 bpid, bpid_base;

	u16 chan_v;

	u64 cfg;



	pf = rvu_get_pf(pcifunc);
@@ -717,6 +746,9 @@ int rvu_mbox_handler_nix_bp_enable(struct rvu *rvu, 
	    type != NIX_INTF_TYPE_SDP)

		return 0;



	if (cpt_link && !rvu->hw->cpt_links)

		return 0;



	pfvf = rvu_get_pfvf(rvu, pcifunc);

	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
@@ -730,9 +762,11 @@ int rvu_mbox_handler_nix_bp_enable(struct rvu *rvu, 
			return -EINVAL;

		}



		cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan));

		chan_v = nix_get_channel(chan, cpt_link);



		cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v));

		cfg &= ~GENMASK_ULL(8, 0);

		rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan),

		rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v),

			    cfg | (bpid & GENMASK_ULL(8, 0)) | BIT_ULL(16));

		chan_id++;

		bpid = rvu_nix_get_bpid(rvu, req, type, chan_id);
@@ -750,6 +784,20 @@ int rvu_mbox_handler_nix_bp_enable(struct rvu *rvu, 
	return 0;

}



int rvu_mbox_handler_nix_bp_enable(struct rvu *rvu,

				   struct nix_bp_cfg_req *req,

				   struct nix_bp_cfg_rsp *rsp)

{

	return nix_bp_enable(rvu, req, rsp, false);

}



int rvu_mbox_handler_nix_cpt_bp_enable(struct rvu *rvu,

				       struct nix_bp_cfg_req *req,

				       struct nix_bp_cfg_rsp *rsp)

{

	return nix_bp_enable(rvu, req, rsp, true);

}



static void nix_setup_lso_tso_l3(struct rvu *rvu, int blkaddr,

				 u64 format, bool v4, u64 *fidx)

{

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c

+37 −7
Original line number Diff line number Diff line
@@ -17,6 +17,11 @@ 
#include "otx2_struct.h"

#include "cn10k.h"



static bool otx2_is_pfc_enabled(struct otx2_nic *pfvf)

{

	return IS_ENABLED(CONFIG_DCB) && !!pfvf->pfc_en;

}



static void otx2_nix_rq_op_stats(struct queue_stats *stats,

				 struct otx2_nic *pfvf, int qidx)

{
@@ -1723,18 +1728,43 @@ int otx2_nix_config_bp(struct otx2_nic *pfvf, bool enable) 
		return -ENOMEM;



	req->chan_base = 0;

#ifdef CONFIG_DCB

	req->chan_cnt = pfvf->pfc_en ? IEEE_8021QAZ_MAX_TCS : 1;

	req->bpid_per_chan = pfvf->pfc_en ? 1 : 0;

#else

	if (otx2_is_pfc_enabled(pfvf)) {

		req->chan_cnt = IEEE_8021QAZ_MAX_TCS;

		req->bpid_per_chan = 1;

	} else {

		req->chan_cnt = 1;

		req->bpid_per_chan = 0;

#endif

	}



	return otx2_sync_mbox_msg(&pfvf->mbox);

}

EXPORT_SYMBOL(otx2_nix_config_bp);



int otx2_nix_cpt_config_bp(struct otx2_nic *pfvf, bool enable)

{

	struct nix_bp_cfg_req *req;



	if (enable)

		req = otx2_mbox_alloc_msg_nix_cpt_bp_enable(&pfvf->mbox);

	else

		req = otx2_mbox_alloc_msg_nix_cpt_bp_disable(&pfvf->mbox);



	if (!req)

		return -ENOMEM;



	req->chan_base = 0;

	if (otx2_is_pfc_enabled(pfvf)) {

		req->chan_cnt = IEEE_8021QAZ_MAX_TCS;

		req->bpid_per_chan = 1;

	} else {

		req->chan_cnt = 1;

		req->bpid_per_chan = 0;

	}



	return otx2_sync_mbox_msg(&pfvf->mbox);

}

EXPORT_SYMBOL(otx2_nix_cpt_config_bp);



/* Mbox message handlers */

void mbox_handler_cgx_stats(struct otx2_nic *pfvf,

			    struct cgx_stats_rsp *rsp)

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h

+1 −0
Original line number Diff line number Diff line
@@ -985,6 +985,7 @@ int otx2_alloc_rbuf(struct otx2_nic *pfvf, struct otx2_pool *pool, 
int otx2_rxtx_enable(struct otx2_nic *pfvf, bool enable);

void otx2_ctx_disable(struct mbox *mbox, int type, bool npa);

int otx2_nix_config_bp(struct otx2_nic *pfvf, bool enable);

int otx2_nix_cpt_config_bp(struct otx2_nic *pfvf, bool enable);

void otx2_cleanup_rx_cqes(struct otx2_nic *pfvf, struct otx2_cq_queue *cq, int qidx);

void otx2_cleanup_tx_cqes(struct otx2_nic *pfvf, struct otx2_cq_queue *cq);

int otx2_sq_init(struct otx2_nic *pfvf, u16 qidx, u16 sqb_aura);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_dcbnl.c

+3 −0
Original line number Diff line number Diff line
@@ -435,6 +435,9 @@ static int otx2_dcbnl_ieee_setpfc(struct net_device *dev, struct ieee_pfc *pfc) 
		return err;

	}



	/* Default disable backpressure on NIX-CPT */

	otx2_nix_cpt_config_bp(pfvf, false);



	/* Request Per channel Bpids */

	if (pfc->pfc_en)

		otx2_nix_config_bp(pfvf, true);