Unverified Commit a7f035c2 authored by Mark Brown's avatar Mark Brown
Browse files

spi: axi-spi-engine: offload instruction optimization 

Merge series from David Lechner <dlechner@baylibre.com>:

In order to achieve a 4 MSPS rate on a 16-bit ADC with a 80 MHz SCLK
using the SPI offload feature of the AXI SPI Engine, we need to shave
off some time that is spent executing unnecessary instructions. There
are a few one-time setup instructions that can be moved so that they
execute only once when the SPI offload trigger is enabled rather than
repeating each time the offload is triggered. Additionally, a recent
change to the IP block allows dropping the SYNC instruction completely.
With these changes, we are left with only the 3 instructions that are
needed to to assert CS, transfer the data, and deassert CS. This makes
3 + 16 * 12.5 ns = 237.5 ns < 250 ns which is comfortably within the
available time period.
parents df8c5ad0 e6702c44

.clang-format

+37 −4
Original line number Diff line number Diff line
@@ -92,6 +92,7 @@ ForEachMacros: 
  - '__rq_for_each_bio'

  - '__shost_for_each_device'

  - '__sym_for_each'

  - '_for_each_counter'

  - 'apei_estatus_for_each_section'

  - 'ata_for_each_dev'

  - 'ata_for_each_link'
@@ -141,11 +142,14 @@ ForEachMacros: 
  - 'damon_for_each_target_safe'

  - 'damos_for_each_filter'

  - 'damos_for_each_filter_safe'

  - 'damos_for_each_ops_filter'

  - 'damos_for_each_ops_filter_safe'

  - 'damos_for_each_quota_goal'

  - 'damos_for_each_quota_goal_safe'

  - 'data__for_each_file'

  - 'data__for_each_file_new'

  - 'data__for_each_file_start'

  - 'def_for_each_cpu'

  - 'device_for_each_child_node'

  - 'device_for_each_child_node_scoped'

  - 'dma_fence_array_for_each'
@@ -176,6 +180,7 @@ ForEachMacros: 
  - 'drm_for_each_privobj'

  - 'drm_gem_for_each_gpuvm_bo'

  - 'drm_gem_for_each_gpuvm_bo_safe'

  - 'drm_gpusvm_for_each_range'

  - 'drm_gpuva_for_each_op'

  - 'drm_gpuva_for_each_op_from_reverse'

  - 'drm_gpuva_for_each_op_reverse'
@@ -216,8 +221,10 @@ ForEachMacros: 
  - 'for_each_active_dev_scope'

  - 'for_each_active_drhd_unit'

  - 'for_each_active_iommu'

  - 'for_each_active_irq'

  - 'for_each_active_route'

  - 'for_each_aggr_pgid'

  - 'for_each_alloc_capable_rdt_resource'

  - 'for_each_and_bit'

  - 'for_each_andnot_bit'

  - 'for_each_available_child_of_node'
@@ -228,6 +235,7 @@ ForEachMacros: 
  - 'for_each_btf_ext_rec'

  - 'for_each_btf_ext_sec'

  - 'for_each_bvec'

  - 'for_each_capable_rdt_resource'

  - 'for_each_card_auxs'

  - 'for_each_card_auxs_safe'

  - 'for_each_card_components'
@@ -241,6 +249,7 @@ ForEachMacros: 
  - 'for_each_cgroup_storage_type'

  - 'for_each_child_of_node'

  - 'for_each_child_of_node_scoped'

  - 'for_each_child_of_node_with_prefix'

  - 'for_each_clear_bit'

  - 'for_each_clear_bit_from'

  - 'for_each_clear_bitrange'
@@ -296,6 +305,7 @@ ForEachMacros: 
  - 'for_each_group_member_head'

  - 'for_each_hstate'

  - 'for_each_hwgpio'

  - 'for_each_hwgpio_in_range'

  - 'for_each_if'

  - 'for_each_inject_fn'

  - 'for_each_insn'
@@ -304,6 +314,7 @@ ForEachMacros: 
  - 'for_each_intid'

  - 'for_each_iommu'

  - 'for_each_ip_tunnel_rcu'

  - 'for_each_irq_desc'

  - 'for_each_irq_nr'

  - 'for_each_lang'

  - 'for_each_link_ch_maps'
@@ -324,6 +335,8 @@ ForEachMacros: 
  - 'for_each_missing_reg'

  - 'for_each_mle_subelement'

  - 'for_each_mod_mem_type'

  - 'for_each_mon_capable_rdt_resource'

  - 'for_each_mp_bvec'

  - 'for_each_net'

  - 'for_each_net_continue_reverse'

  - 'for_each_net_rcu'
@@ -351,6 +364,7 @@ ForEachMacros: 
  - 'for_each_node_by_name'

  - 'for_each_node_by_type'

  - 'for_each_node_mask'

  - 'for_each_node_numadist'

  - 'for_each_node_state'

  - 'for_each_node_with_cpus'

  - 'for_each_node_with_property'
@@ -359,6 +373,8 @@ ForEachMacros: 
  - 'for_each_of_allnodes'

  - 'for_each_of_allnodes_from'

  - 'for_each_of_cpu_node'

  - 'for_each_of_graph_port'

  - 'for_each_of_graph_port_endpoint'

  - 'for_each_of_pci_range'

  - 'for_each_old_connector_in_state'

  - 'for_each_old_crtc_in_state'
@@ -372,9 +388,11 @@ ForEachMacros: 
  - 'for_each_oldnew_plane_in_state_reverse'

  - 'for_each_oldnew_private_obj_in_state'

  - 'for_each_online_cpu'

  - 'for_each_online_cpu_wrap'

  - 'for_each_online_node'

  - 'for_each_online_pgdat'

  - 'for_each_or_bit'

  - 'for_each_page_ext'

  - 'for_each_path'

  - 'for_each_pci_bridge'

  - 'for_each_pci_dev'
@@ -382,8 +400,10 @@ ForEachMacros: 
  - 'for_each_physmem_range'

  - 'for_each_populated_zone'

  - 'for_each_possible_cpu'

  - 'for_each_possible_cpu_wrap'

  - 'for_each_present_blessed_reg'

  - 'for_each_present_cpu'

  - 'for_each_present_section_nr'

  - 'for_each_prime_number'

  - 'for_each_prime_number_from'

  - 'for_each_probe_cache_entry'
@@ -396,6 +416,7 @@ ForEachMacros: 
  - 'for_each_prop_dlc_cpus'

  - 'for_each_prop_dlc_platforms'

  - 'for_each_property_of_node'

  - 'for_each_rdt_resource'

  - 'for_each_reg'

  - 'for_each_reg_filtered'

  - 'for_each_reloc'
@@ -434,10 +455,10 @@ ForEachMacros: 
  - 'for_each_subelement_id'

  - 'for_each_sublist'

  - 'for_each_subsystem'

  - 'for_each_suite'

  - 'for_each_supported_activate_fn'

  - 'for_each_supported_inject_fn'

  - 'for_each_sym'

  - 'for_each_test'

  - 'for_each_thread'

  - 'for_each_token'

  - 'for_each_unicast_dest_pgid'
@@ -499,8 +520,10 @@ ForEachMacros: 
  - 'idr_for_each_entry_continue'

  - 'idr_for_each_entry_continue_ul'

  - 'idr_for_each_entry_ul'

  - 'iio_for_each_active_channel'

  - 'in_dev_for_each_ifa_rcu'

  - 'in_dev_for_each_ifa_rtnl'

  - 'in_dev_for_each_ifa_rtnl_net'

  - 'inet_bind_bucket_for_each'

  - 'interval_tree_for_each_span'

  - 'intlist__for_each_entry'
@@ -542,7 +565,6 @@ ForEachMacros: 
  - 'list_for_each_prev'

  - 'list_for_each_prev_safe'

  - 'list_for_each_rcu'

  - 'list_for_each_reverse'

  - 'list_for_each_safe'

  - 'llist_for_each'

  - 'llist_for_each_entry'
@@ -552,6 +574,7 @@ ForEachMacros: 
  - 'map__for_each_symbol'

  - 'map__for_each_symbol_by_name'

  - 'mas_for_each'

  - 'mas_for_each_rev'

  - 'mci_for_each_dimm'

  - 'media_device_for_each_entity'

  - 'media_device_for_each_intf'
@@ -561,10 +584,15 @@ ForEachMacros: 
  - 'media_pipeline_for_each_entity'

  - 'media_pipeline_for_each_pad'

  - 'mlx5_lag_for_each_peer_mdev'

  - 'mptcp_for_each_subflow'

  - 'msi_domain_for_each_desc'

  - 'msi_for_each_desc'

  - 'mt_for_each'

  - 'nanddev_io_for_each_block'

  - 'nanddev_io_for_each_page'

  - 'neigh_for_each_in_bucket'

  - 'neigh_for_each_in_bucket_rcu'

  - 'neigh_for_each_in_bucket_safe'

  - 'netdev_for_each_lower_dev'

  - 'netdev_for_each_lower_private'

  - 'netdev_for_each_lower_private_rcu'
@@ -604,11 +632,11 @@ ForEachMacros: 
  - 'perf_evlist__for_each_entry_safe'

  - 'perf_evlist__for_each_evsel'

  - 'perf_evlist__for_each_mmap'

  - 'perf_evsel_for_each_per_thread_period_safe'

  - 'perf_hpp_list__for_each_format'

  - 'perf_hpp_list__for_each_format_safe'

  - 'perf_hpp_list__for_each_sort_list'

  - 'perf_hpp_list__for_each_sort_list_safe'

  - 'perf_tool_event__for_each_event'

  - 'plist_for_each'

  - 'plist_for_each_continue'

  - 'plist_for_each_entry'
@@ -627,7 +655,6 @@ ForEachMacros: 
  - 'rdma_for_each_block'

  - 'rdma_for_each_port'

  - 'rdma_umem_for_each_dma_block'

  - 'resort_rb__for_each_entry'

  - 'resource_list_for_each_entry'

  - 'resource_list_for_each_entry_safe'

  - 'rhl_for_each_entry_rcu'
@@ -658,6 +685,7 @@ ForEachMacros: 
  - 'shost_for_each_device'

  - 'sk_for_each'

  - 'sk_for_each_bound'

  - 'sk_for_each_bound_safe'

  - 'sk_for_each_entry_offset_rcu'

  - 'sk_for_each_from'

  - 'sk_for_each_rcu'
@@ -680,7 +708,11 @@ ForEachMacros: 
  - 'tb_property_for_each'

  - 'tcf_act_for_each_action'

  - 'tcf_exts_for_each_action'

  - 'test_suite__for_each_test_case'

  - 'tool_pmu__for_each_event'

  - 'ttm_bo_lru_for_each_reserved_guarded'

  - 'ttm_resource_manager_for_each_res'

  - 'udp_lrpa_for_each_entry_rcu'

  - 'udp_portaddr_for_each_entry'

  - 'udp_portaddr_for_each_entry_rcu'

  - 'usb_hub_for_each_child'
@@ -691,6 +723,7 @@ ForEachMacros: 
  - 'v4l2_m2m_for_each_src_buf_safe'

  - 'virtio_device_for_each_vq'

  - 'while_for_each_ftrace_op'

  - 'workloads__for_each'

  - 'xa_for_each'

  - 'xa_for_each_marked'

  - 'xa_for_each_range'

.mailmap

+5 −0
Original line number Diff line number Diff line
@@ -322,6 +322,7 @@ Jayachandran C <c.jayachandran@gmail.com> <jchandra@broadcom.com> 
Jayachandran C <c.jayachandran@gmail.com> <jchandra@digeo.com>

Jayachandran C <c.jayachandran@gmail.com> <jnair@caviumnetworks.com>

<jean-philippe@linaro.org> <jean-philippe.brucker@arm.com>

Jean-Michel Hautbois <jeanmichel.hautbois@yoseli.org> <jeanmichel.hautbois@ideasonboard.com>

Jean Tourrilhes <jt@hpl.hp.com>

Jeevan Shriram <quic_jshriram@quicinc.com> <jshriram@codeaurora.org>

Jeff Garzik <jgarzik@pretzel.yyz.us>
@@ -438,6 +439,8 @@ Linus Lüssing <linus.luessing@c0d3.blue> <ll@simonwunderlich.de> 
Li Yang <leoyang.li@nxp.com> <leoli@freescale.com>

Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>

Lior David <quic_liord@quicinc.com> <liord@codeaurora.org>

Loic Poulain <loic.poulain@oss.qualcomm.com> <loic.poulain@linaro.org>

Loic Poulain <loic.poulain@oss.qualcomm.com> <loic.poulain@intel.com>

Lorenzo Pieralisi <lpieralisi@kernel.org> <lorenzo.pieralisi@arm.com>

Lorenzo Stoakes <lorenzo.stoakes@oracle.com> <lstoakes@gmail.com>

Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net>
@@ -685,6 +688,8 @@ Simon Wunderlich <sw@simonwunderlich.de> <simon.wunderlich@saxnet.de> 
Simon Wunderlich <sw@simonwunderlich.de> <simon@open-mesh.com>

Simon Wunderlich <sw@simonwunderlich.de> <siwu@hrz.tu-chemnitz.de>

Sricharan Ramabadhran <quic_srichara@quicinc.com> <sricharan@codeaurora.org>

Srinivas Kandagatla <srini@kernel.org> <srinivas.kandagatla@st.com>

Srinivas Kandagatla <srini@kernel.org> <srinivas.kandagatla@linaro.org>

Srinivas Ramana <quic_sramana@quicinc.com> <sramana@codeaurora.org>

Sriram R <quic_srirrama@quicinc.com> <srirrama@codeaurora.org>

Sriram Yagnaraman <sriram.yagnaraman@ericsson.com> <sriram.yagnaraman@est.tech>

CREDITS

+4 −0
Original line number Diff line number Diff line
@@ -2071,6 +2071,10 @@ S: 660 Harvard Ave. #7 
S: Santa Clara, CA 95051

S: USA



N: Joonsoo Kim

E: iamjoonsoo.kim@lge.com

D: Slab allocators



N: Kukjin Kim

E: kgene@kernel.org

D: Samsung S3C, S5P and Exynos ARM architectures

Documentation/ABI/stable/sysfs-block

+1 −1
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ Description: 


What:		/sys/block/<disk>/diskseq

Date:		February 2021

Contact:	Matteo Croce <mcroce@microsoft.com>

Contact:	Matteo Croce <teknoraver@meta.com>

Description:

		The /sys/block/<disk>/diskseq files reports the disk

		sequence number, which is a monotonically increasing

Documentation/ABI/testing/sysfs-driver-ufs

+32 −0
Original line number Diff line number Diff line
@@ -1604,3 +1604,35 @@ Description: 
		prevent the UFS from frequently performing clock gating/ungating.



		The attribute is read/write.



What:		/sys/bus/platform/drivers/ufshcd/*/device_lvl_exception_count

What:		/sys/bus/platform/devices/*.ufs/device_lvl_exception_count

Date:		March 2025

Contact:	Bao D. Nguyen <quic_nguyenb@quicinc.com>

Description:

		This attribute is applicable to ufs devices compliant to the

		JEDEC specifications version 4.1 or later. The

		device_lvl_exception_count is a counter indicating the number of

		times the device level exceptions have occurred since the last

		time this variable is reset.  Writing a 0 value to this

		attribute will reset the device_lvl_exception_count.  If the

		device_lvl_exception_count reads a positive value, the user

		application should read the device_lvl_exception_id attribute to

		know more information about the exception.



		The attribute is read/write.



What:		/sys/bus/platform/drivers/ufshcd/*/device_lvl_exception_id

What:		/sys/bus/platform/devices/*.ufs/device_lvl_exception_id

Date:		March 2025

Contact:	Bao D. Nguyen <quic_nguyenb@quicinc.com>

Description:

		Reading the device_lvl_exception_id returns the

		qDeviceLevelExceptionID attribute of the ufs device JEDEC

		specification version 4.1. The definition of the

		qDeviceLevelExceptionID is the ufs device vendor specific

		implementation.  Refer to the device manufacturer datasheet for

		more information on the meaning of the qDeviceLevelExceptionID

		attribute value.



		The attribute is read only.