Commit a8a3bddb authored by Paolo Abeni's avatar Paolo Abeni
Browse files

Merge branch 'follow-up-to-rgmii-mode-clarification-am65-cpsw-fix-checkpatch' 

Matthias Schiffer says:

====================
Follow-up to RGMII mode clarification: am65-cpsw fix + checkpatch

Following previous discussion [1] and the documentation update by
Andrew [2]:

Fix up the mode to account for the fixed TX delay on the AM65 CPSW
Ethernet controllers, similar to the way the icssg-prueth does it. For
backwards compatibility, the "impossible" modes that claim to have a
delay on the PCB are still accepted, but trigger a warning message.

As Andrew suggested, I have also added a checkpatch check that requires
a comment for any RGMII mode that is not "rgmii-id".

No Device Trees are updated to avoid the warning for now, to give other
projects syncing the Linux Device Trees some time to fix their drivers
as well. I intend to submit an equivalent change for U-Boot's
am65-cpsw-nuss driver as soon as the changes are accepted for Linux.

[1] https://lore.kernel.org/lkml/d25b1447-c28b-4998-b238-92672434dc28@lunn.ch/
[2] https://lore.kernel.org/all/20250430-v6-15-rc3-net-rgmii-delays-v2-1-099ae651d5e5@lunn.ch/
    commit c360eb0c ("dt-bindings: net: ethernet-controller: Add informative text about RGMII delays")
v1: https://lore.kernel.org/all/cover.1744710099.git.matthias.schiffer@ew.tq-group.com/
====================

Link: https://patch.msgid.link/cover.1750756583.git.matthias.schiffer@ew.tq-group.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parents a9b24b35 e02adac7

Documentation/dev-tools/checkpatch.rst

+9 −0
Original line number Diff line number Diff line
@@ -495,6 +495,15 @@ Comments 


    See: https://lore.kernel.org/lkml/20131006222342.GT19510@leaf/



  **UNCOMMENTED_RGMII_MODE**

    Historically, the RGMII PHY modes specified in Device Trees have been

    used inconsistently, often referring to the usage of delays on the PHY

    side rather than describing the board.



    PHY modes "rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock

    signal to be delayed on the PCB; this unusual configuration should be

    described in a comment. If they are not (meaning that the delay is realized

    internally in the MAC or PHY), "rgmii-id" is the correct PHY mode.



Commit message

--------------

Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml

+1 −1
Original line number Diff line number Diff line
@@ -284,7 +284,7 @@ examples: 
                    ti,syscon-efuse = <&mcu_conf 0x200>;

                    phys = <&phy_gmii_sel 1>;



                    phy-mode = "rgmii-rxid";

                    phy-mode = "rgmii-id";

                    phy-handle = <&phy0>;

                };

            };

drivers/net/ethernet/ti/am65-cpsw-nuss.c

+25 −2
Original line number Diff line number Diff line
@@ -2602,6 +2602,7 @@ static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common) 
		return -ENOENT;



	for_each_child_of_node(node, port_np) {

		phy_interface_t phy_if;

		struct am65_cpsw_port *port;

		u32 port_id;
@@ -2667,14 +2668,36 @@ static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common) 


		/* get phy/link info */

		port->slave.port_np = of_node_get(port_np);

		ret = of_get_phy_mode(port_np, &port->slave.phy_if);

		ret = of_get_phy_mode(port_np, &phy_if);

		if (ret) {

			dev_err(dev, "%pOF read phy-mode err %d\n",

				port_np, ret);

			goto of_node_put;

		}



		ret = phy_set_mode_ext(port->slave.ifphy, PHY_MODE_ETHERNET, port->slave.phy_if);

		/* CPSW controllers supported by this driver have a fixed

		 * internal TX delay in RGMII mode. Fix up PHY mode to account

		 * for this and warn about Device Trees that claim to have a TX

		 * delay on the PCB.

		 */

		switch (phy_if) {

		case PHY_INTERFACE_MODE_RGMII_ID:

			phy_if = PHY_INTERFACE_MODE_RGMII_RXID;

			break;

		case PHY_INTERFACE_MODE_RGMII_TXID:

			phy_if = PHY_INTERFACE_MODE_RGMII;

			break;

		case PHY_INTERFACE_MODE_RGMII:

		case PHY_INTERFACE_MODE_RGMII_RXID:

			dev_warn(dev,

				 "RGMII mode without internal TX delay unsupported; please fix your Device Tree\n");

			break;

		default:

			break;

		}



		port->slave.phy_if = phy_if;

		ret = phy_set_mode_ext(port->slave.ifphy, PHY_MODE_ETHERNET, phy_if);

		if (ret)

			goto of_node_put;

scripts/checkpatch.pl

+12 −0
Original line number Diff line number Diff line
@@ -3741,6 +3741,18 @@ sub process { 
			}

		}



# Check for RGMII phy-mode with delay on PCB

		if ($realfile =~ /\.(dts|dtsi|dtso)$/ &&

		    $line =~ /^\+\s*(phy-mode|phy-connection-type)\s*=\s*"/ &&

		    !ctx_has_comment($first_line, $linenr)) {

			my $prop = $1;

			my $mode = get_quoted_string($line, $rawline);

			if ($mode =~ /^"rgmii(?:|-rxid|-txid)"$/) {

				WARN("UNCOMMENTED_RGMII_MODE",

				     "$prop $mode without comment -- delays on the PCB should be described, otherwise use \"rgmii-id\"\n" . $herecurr);

			}

		}



# check for using SPDX license tag at beginning of files

		if ($realline == $checklicenseline) {

			if ($rawline =~ /^[ \+]\s*\#\!\s*\//) {