Loading arch/mips/kernel/irq_cpu.c +21 −25 Original line number Diff line number Diff line Loading @@ -37,42 +37,38 @@ #include <asm/mipsmtregs.h> #include <asm/system.h> static inline void unmask_mips_irq(unsigned int irq) static inline void unmask_mips_irq(struct irq_data *d) { set_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); set_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE)); irq_enable_hazard(); } static inline void mask_mips_irq(unsigned int irq) static inline void mask_mips_irq(struct irq_data *d) { clear_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); clear_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE)); irq_disable_hazard(); } static struct irq_chip mips_cpu_irq_controller = { .name = "MIPS", .ack = mask_mips_irq, .mask = mask_mips_irq, .mask_ack = mask_mips_irq, .unmask = unmask_mips_irq, .eoi = unmask_mips_irq, .irq_ack = mask_mips_irq, .irq_mask = mask_mips_irq, .irq_mask_ack = mask_mips_irq, .irq_unmask = unmask_mips_irq, .irq_eoi = unmask_mips_irq, }; /* * Basically the same as above but taking care of all the MT stuff */ #define unmask_mips_mt_irq unmask_mips_irq #define mask_mips_mt_irq mask_mips_irq static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) static unsigned int mips_mt_cpu_irq_startup(struct irq_data *d) { unsigned int vpflags = dvpe(); clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); clear_c0_cause(0x100 << (d->irq - MIPS_CPU_IRQ_BASE)); evpe(vpflags); unmask_mips_mt_irq(irq); unmask_mips_irq(d); return 0; } Loading @@ -80,22 +76,22 @@ static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) * While we ack the interrupt interrupts are disabled and thus we don't need * to deal with concurrency issues. Same for mips_cpu_irq_end. */ static void mips_mt_cpu_irq_ack(unsigned int irq) static void mips_mt_cpu_irq_ack(struct irq_data *d) { unsigned int vpflags = dvpe(); clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); clear_c0_cause(0x100 << (d->irq - MIPS_CPU_IRQ_BASE)); evpe(vpflags); mask_mips_mt_irq(irq); mask_mips_irq(d); } static struct irq_chip mips_mt_cpu_irq_controller = { .name = "MIPS", .startup = mips_mt_cpu_irq_startup, .ack = mips_mt_cpu_irq_ack, .mask = mask_mips_mt_irq, .mask_ack = mips_mt_cpu_irq_ack, .unmask = unmask_mips_mt_irq, .eoi = unmask_mips_mt_irq, .irq_startup = mips_mt_cpu_irq_startup, .irq_ack = mips_mt_cpu_irq_ack, .irq_mask = mask_mips_irq, .irq_mask_ack = mips_mt_cpu_irq_ack, .irq_unmask = unmask_mips_irq, .irq_eoi = unmask_mips_irq, }; void __init mips_cpu_irq_init(void) Loading Loading
arch/mips/kernel/irq_cpu.c +21 −25 Original line number Diff line number Diff line Loading @@ -37,42 +37,38 @@ #include <asm/mipsmtregs.h> #include <asm/system.h> static inline void unmask_mips_irq(unsigned int irq) static inline void unmask_mips_irq(struct irq_data *d) { set_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); set_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE)); irq_enable_hazard(); } static inline void mask_mips_irq(unsigned int irq) static inline void mask_mips_irq(struct irq_data *d) { clear_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); clear_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE)); irq_disable_hazard(); } static struct irq_chip mips_cpu_irq_controller = { .name = "MIPS", .ack = mask_mips_irq, .mask = mask_mips_irq, .mask_ack = mask_mips_irq, .unmask = unmask_mips_irq, .eoi = unmask_mips_irq, .irq_ack = mask_mips_irq, .irq_mask = mask_mips_irq, .irq_mask_ack = mask_mips_irq, .irq_unmask = unmask_mips_irq, .irq_eoi = unmask_mips_irq, }; /* * Basically the same as above but taking care of all the MT stuff */ #define unmask_mips_mt_irq unmask_mips_irq #define mask_mips_mt_irq mask_mips_irq static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) static unsigned int mips_mt_cpu_irq_startup(struct irq_data *d) { unsigned int vpflags = dvpe(); clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); clear_c0_cause(0x100 << (d->irq - MIPS_CPU_IRQ_BASE)); evpe(vpflags); unmask_mips_mt_irq(irq); unmask_mips_irq(d); return 0; } Loading @@ -80,22 +76,22 @@ static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) * While we ack the interrupt interrupts are disabled and thus we don't need * to deal with concurrency issues. Same for mips_cpu_irq_end. */ static void mips_mt_cpu_irq_ack(unsigned int irq) static void mips_mt_cpu_irq_ack(struct irq_data *d) { unsigned int vpflags = dvpe(); clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); clear_c0_cause(0x100 << (d->irq - MIPS_CPU_IRQ_BASE)); evpe(vpflags); mask_mips_mt_irq(irq); mask_mips_irq(d); } static struct irq_chip mips_mt_cpu_irq_controller = { .name = "MIPS", .startup = mips_mt_cpu_irq_startup, .ack = mips_mt_cpu_irq_ack, .mask = mask_mips_mt_irq, .mask_ack = mips_mt_cpu_irq_ack, .unmask = unmask_mips_mt_irq, .eoi = unmask_mips_mt_irq, .irq_startup = mips_mt_cpu_irq_startup, .irq_ack = mips_mt_cpu_irq_ack, .irq_mask = mask_mips_irq, .irq_mask_ack = mips_mt_cpu_irq_ack, .irq_unmask = unmask_mips_irq, .irq_eoi = unmask_mips_irq, }; void __init mips_cpu_irq_init(void) Loading