Commit a988caee authored by Sherry Sun's avatar Sherry Sun Committed by Shawn Guo
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arm64: dts: imx8qm-ss-dma: correct the dma channels of lpuart 



The commit 616effc0 ("arm64: dts: imx8: Fix lpuart DMA channel
order") swap uart rx and tx channel at common imx8-ss-dma.dtsi. But miss
update imx8qm-ss-dma.dtsi.

The commit 5a8e9b02 ("arm64: dts: imx8qm-ss-dma: Pass lpuart
dma-names") just simple add dma-names as binding doc requirement.

Correct lpuart0 - lpuart3 dma rx and tx channels, and use defines for
the FSL_EDMA_RX flag.

Fixes: 5a8e9b02 ("arm64: dts: imx8qm-ss-dma: Pass lpuart dma-names")
Signed-off-by: default avatarSherry Sun <sherry.sun@nxp.com>
Reviewed-by: default avatarFrank Li <Frank.Li@nxp.com>
Reviewed-by: default avatarAlexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent c63749a7

arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -172,25 +172,25 @@ &flexcan3 { 


&lpuart0 {

	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";

	dmas = <&edma2 13 0 0>, <&edma2 12 0 1>;

	dmas = <&edma2 12 0 FSL_EDMA_RX>, <&edma2 13 0 0>;

	dma-names = "rx","tx";

};



&lpuart1 {

	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";

	dmas = <&edma2 15 0 0>, <&edma2 14 0 1>;

	dmas = <&edma2 14 0 FSL_EDMA_RX>, <&edma2 15 0 0>;

	dma-names = "rx","tx";

};



&lpuart2 {

	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";

	dmas = <&edma2 17 0 0>, <&edma2 16 0 1>;

	dmas = <&edma2 16 0 FSL_EDMA_RX>, <&edma2 17 0 0>;

	dma-names = "rx","tx";

};



&lpuart3 {

	compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";

	dmas = <&edma2 19 0 0>, <&edma2 18 0 1>;

	dmas = <&edma2 18 0 FSL_EDMA_RX>, <&edma2 19 0 0>;

	dma-names = "rx","tx";

};