Commit a99b1e7f authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915: pass dev_priv explicitly to DSPSIZE 



Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPSIZE register macro.

Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/d24ee614cac29ccc3917f9cba1ce03ce54fb7d8b.1716469091.git.jani.nikula@intel.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 3ebfafa7

drivers/gpu/drm/i915/display/i9xx_plane.c

+1 −1
Original line number Diff line number Diff line
@@ -439,7 +439,7 @@ static void i9xx_plane_update_noarm(struct intel_plane *plane, 
		 */

		intel_de_write_fw(dev_priv, DSPPOS(dev_priv, i9xx_plane),

				  DISP_POS_Y(crtc_y) | DISP_POS_X(crtc_x));

		intel_de_write_fw(dev_priv, DSPSIZE(i9xx_plane),

		intel_de_write_fw(dev_priv, DSPSIZE(dev_priv, i9xx_plane),

				  DISP_HEIGHT(crtc_h - 1) | DISP_WIDTH(crtc_w - 1));

	}

}

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

+1 −1
Original line number Diff line number Diff line
@@ -60,7 +60,7 @@ 
#define   DISP_POS_X(x)			REG_FIELD_PREP(DISP_POS_X_MASK, (x))



#define _DSPASIZE				0x70190 /* pre-g4x */

#define DSPSIZE(plane)				_MMIO_PIPE2(dev_priv, plane, _DSPASIZE)

#define DSPSIZE(dev_priv, plane)		_MMIO_PIPE2(dev_priv, plane, _DSPASIZE)

#define   DISP_HEIGHT_MASK		REG_GENMASK(31, 16)

#define   DISP_HEIGHT(h)		REG_FIELD_PREP(DISP_HEIGHT_MASK, (h))

#define   DISP_WIDTH_MASK		REG_GENMASK(15, 0)

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

+3 −3
Original line number Diff line number Diff line
@@ -169,7 +169,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) 
	MMIO_D(DSPADDR(dev_priv, PIPE_A));

	MMIO_D(DSPSTRIDE(dev_priv, PIPE_A));

	MMIO_D(DSPPOS(dev_priv, PIPE_A));

	MMIO_D(DSPSIZE(PIPE_A));

	MMIO_D(DSPSIZE(dev_priv, PIPE_A));

	MMIO_D(DSPSURF(PIPE_A));

	MMIO_D(DSPOFFSET(PIPE_A));

	MMIO_D(DSPSURFLIVE(PIPE_A));
@@ -178,7 +178,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) 
	MMIO_D(DSPADDR(dev_priv, PIPE_B));

	MMIO_D(DSPSTRIDE(dev_priv, PIPE_B));

	MMIO_D(DSPPOS(dev_priv, PIPE_B));

	MMIO_D(DSPSIZE(PIPE_B));

	MMIO_D(DSPSIZE(dev_priv, PIPE_B));

	MMIO_D(DSPSURF(PIPE_B));

	MMIO_D(DSPOFFSET(PIPE_B));

	MMIO_D(DSPSURFLIVE(PIPE_B));
@@ -187,7 +187,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) 
	MMIO_D(DSPADDR(dev_priv, PIPE_C));

	MMIO_D(DSPSTRIDE(dev_priv, PIPE_C));

	MMIO_D(DSPPOS(dev_priv, PIPE_C));

	MMIO_D(DSPSIZE(PIPE_C));

	MMIO_D(DSPSIZE(dev_priv, PIPE_C));

	MMIO_D(DSPSURF(PIPE_C));

	MMIO_D(DSPOFFSET(PIPE_C));

	MMIO_D(DSPSURFLIVE(PIPE_C));