Commit a9cbeb60 authored by JinZe Xu's avatar JinZe Xu Committed by Alex Deucher
Browse files

drm/amd/display: Send IPSExit unconditionally. 



[Why&How]
PMFW needs to flush page cache in IPSExit.

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarJinZe Xu <JinZe.Xu@amd.com>
Signed-off-by: default avatarRay Wu <ray.wu@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 18a77bda

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

+8 −7
Original line number Diff line number Diff line
@@ -1365,7 +1365,6 @@ static void dc_dmub_srv_exit_low_power_state(const struct dc *dc) 
			if (!dc->debug.optimize_ips_handshake || !ips_fw->signals.bits.ips2_commit)

				udelay(dc->debug.ips2_eval_delay_us);



			if (ips_fw->signals.bits.ips2_commit) {

			DC_LOG_IPS(

				"exit IPS2 #1 (ips1_commit=%u ips2_commit=%u)",

				ips_fw->signals.bits.ips1_commit,
@@ -1374,6 +1373,8 @@ static void dc_dmub_srv_exit_low_power_state(const struct dc *dc) 
			// Tell PMFW to exit low power state

			dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr);



			if (ips_fw->signals.bits.ips2_commit) {



				DC_LOG_IPS(

					"wait IPS2 entry delay (ips1_commit=%u ips2_commit=%u)",

					ips_fw->signals.bits.ips1_commit,