Commit a9e1e4d6 authored by Dario Binacchi's avatar Dario Binacchi Committed by Michael Ellerman
Browse files

powerpc/85xx: Fix typo in code comment 



s/singals/signals/

Signed-off-by: default avatarDario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20231124100241.660374-1-dario.binacchi@amarulasolutions.com
parent e12d8e26

arch/powerpc/platforms/85xx/mpc85xx_rdb.c

+1 −1
Original line number Diff line number Diff line
@@ -76,7 +76,7 @@ static void __init mpc85xx_rdb_setup_arch(void) 
			/* P1025 has pins muxed for QE and other functions. To

			* enable QE UEC mode, we need to set bit QE0 for UCC1

			* in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9

			* and QE12 for QE MII management singals in PMUXCR

			* and QE12 for QE MII management signals in PMUXCR

			* register.

			*/

				setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |