Commit a9f7b199 authored by Jerome Brunet's avatar Jerome Brunet
Browse files

clk: meson: g12a: add controller register init 



Add the MPLL common register initial setting

Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
parent 19a18d42

drivers/clk/meson/g12a.c

+7 −1
Original line number Diff line number Diff line
@@ -2992,10 +2992,16 @@ static struct clk_regmap *const g12a_clk_regmaps[] = { 
	&g12a_vdec_hevcf,

};



static const struct reg_sequence g12a_init_regs[] = {

	{ .reg = HHI_MPLL_CNTL0,	.def = 0x00000543 },

};



static const struct meson_eeclkc_data g12a_clkc_data = {

	.regmap_clks = g12a_clk_regmaps,

	.regmap_clk_num = ARRAY_SIZE(g12a_clk_regmaps),

	.hw_onecell_data = &g12a_hw_onecell_data

	.hw_onecell_data = &g12a_hw_onecell_data,

	.init_regs = g12a_init_regs,

	.init_count = ARRAY_SIZE(g12a_init_regs),

};



static const struct of_device_id clkc_match_table[] = {