Commit aa71f987 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: s/pipe_config/crtc_state/ 



Rename some of the 'pipe_config's to the more modern
'crtc_state'.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220503182242.18797-9-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 3d140a3d

drivers/gpu/drm/i915/display/intel_display.c

+31 −31
Original line number Diff line number Diff line
@@ -5017,10 +5017,10 @@ static void intel_modeset_update_connector_atomic_state(struct drm_device *dev) 


static int

compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,

		      struct intel_crtc_state *pipe_config)

		      struct intel_crtc_state *crtc_state)

{

	struct drm_connector *connector = conn_state->connector;

	struct drm_i915_private *i915 = to_i915(pipe_config->uapi.crtc->dev);

	struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);

	const struct drm_display_info *info = &connector->display_info;

	int bpp;
@@ -5042,16 +5042,16 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state, 
		return -EINVAL;

	}



	if (bpp < pipe_config->pipe_bpp) {

	if (bpp < crtc_state->pipe_bpp) {

		drm_dbg_kms(&i915->drm,

			    "[CONNECTOR:%d:%s] Limiting display bpp to %d instead of "

			    "EDID bpp %d, requested bpp %d, max platform bpp %d\n",

			    connector->base.id, connector->name,

			    bpp, 3 * info->bpc,

			    3 * conn_state->max_requested_bpc,

			    pipe_config->pipe_bpp);

			    crtc_state->pipe_bpp);



		pipe_config->pipe_bpp = bpp;

		crtc_state->pipe_bpp = bpp;

	}



	return 0;
@@ -5062,7 +5062,7 @@ compute_baseline_pipe_bpp(struct intel_atomic_state *state, 
			  struct intel_crtc *crtc)

{

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	struct intel_crtc_state *pipe_config =

	struct intel_crtc_state *crtc_state =

		intel_atomic_get_new_crtc_state(state, crtc);

	struct drm_connector *connector;

	struct drm_connector_state *connector_state;
@@ -5076,7 +5076,7 @@ compute_baseline_pipe_bpp(struct intel_atomic_state *state, 
	else

		bpp = 8*3;



	pipe_config->pipe_bpp = bpp;

	crtc_state->pipe_bpp = bpp;



	/* Clamp display bpp to connector max bpp */

	for_each_new_connector_in_state(&state->base, connector, connector_state, i) {
@@ -5085,7 +5085,7 @@ compute_baseline_pipe_bpp(struct intel_atomic_state *state, 
		if (connector_state->crtc != &crtc->base)

			continue;



		ret = compute_sink_pipe_bpp(connector_state, pipe_config);

		ret = compute_sink_pipe_bpp(connector_state, crtc_state);

		if (ret)

			return ret;

	}
@@ -5642,7 +5642,7 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, 
			  struct intel_crtc *crtc)

{

	struct drm_i915_private *i915 = to_i915(crtc->base.dev);

	struct intel_crtc_state *pipe_config =

	struct intel_crtc_state *crtc_state =

		intel_atomic_get_new_crtc_state(state, crtc);

	struct drm_connector *connector;

	struct drm_connector_state *connector_state;
@@ -5650,28 +5650,28 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, 
	int base_bpp, ret, i;

	bool retry = true;



	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;

	crtc_state->cpu_transcoder = (enum transcoder) crtc->pipe;



	pipe_config->framestart_delay = 1;

	crtc_state->framestart_delay = 1;



	/*

	 * Sanitize sync polarity flags based on requested ones. If neither

	 * positive or negative polarity is requested, treat this as meaning

	 * negative polarity.

	 */

	if (!(pipe_config->hw.adjusted_mode.flags &

	if (!(crtc_state->hw.adjusted_mode.flags &

	      (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC)))

		pipe_config->hw.adjusted_mode.flags |= DRM_MODE_FLAG_NHSYNC;

		crtc_state->hw.adjusted_mode.flags |= DRM_MODE_FLAG_NHSYNC;



	if (!(pipe_config->hw.adjusted_mode.flags &

	if (!(crtc_state->hw.adjusted_mode.flags &

	      (DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC)))

		pipe_config->hw.adjusted_mode.flags |= DRM_MODE_FLAG_NVSYNC;

		crtc_state->hw.adjusted_mode.flags |= DRM_MODE_FLAG_NVSYNC;



	ret = compute_baseline_pipe_bpp(state, crtc);

	if (ret)

		return ret;



	base_bpp = pipe_config->pipe_bpp;

	base_bpp = crtc_state->pipe_bpp;



	/*

	 * Determine the real pipe dimensions. Note that stereo modes can
@@ -5681,9 +5681,9 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, 
	 * computation to clearly distinguish it from the adjusted mode, which

	 * can be changed by the connectors in the below retry loop.

	 */

	drm_mode_get_hv_timing(&pipe_config->hw.mode,

	drm_mode_get_hv_timing(&crtc_state->hw.mode,

			       &pipe_src_w, &pipe_src_h);

	drm_rect_init(&pipe_config->pipe_src, 0, 0,

	drm_rect_init(&crtc_state->pipe_src, 0, 0,

		      pipe_src_w, pipe_src_h);



	for_each_new_connector_in_state(&state->base, connector, connector_state, i) {
@@ -5704,20 +5704,20 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, 
		 * hooks so that the hooks can use this information safely.

		 */

		if (encoder->compute_output_type)

			pipe_config->output_types |=

				BIT(encoder->compute_output_type(encoder, pipe_config,

			crtc_state->output_types |=

				BIT(encoder->compute_output_type(encoder, crtc_state,

								 connector_state));

		else

			pipe_config->output_types |= BIT(encoder->type);

			crtc_state->output_types |= BIT(encoder->type);

	}



encoder_retry:

	/* Ensure the port clock defaults are reset when retrying. */

	pipe_config->port_clock = 0;

	pipe_config->pixel_multiplier = 1;

	crtc_state->port_clock = 0;

	crtc_state->pixel_multiplier = 1;



	/* Fill in default crtc timings, allow encoders to overwrite them. */

	drm_mode_set_crtcinfo(&pipe_config->hw.adjusted_mode,

	drm_mode_set_crtcinfo(&crtc_state->hw.adjusted_mode,

			      CRTC_STEREO_DOUBLE);



	/* Pass our mode to the connectors and the CRTC to give them a chance to
@@ -5731,7 +5731,7 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, 
		if (connector_state->crtc != &crtc->base)

			continue;



		ret = encoder->compute_config(encoder, pipe_config,

		ret = encoder->compute_config(encoder, crtc_state,

					      connector_state);

		if (ret == -EDEADLK)

			return ret;
@@ -5743,9 +5743,9 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, 


	/* Set default port clock if not overwritten by the encoder. Needs to be

	 * done afterwards in case the encoder adjusts the mode. */

	if (!pipe_config->port_clock)

		pipe_config->port_clock = pipe_config->hw.adjusted_mode.crtc_clock

			* pipe_config->pixel_multiplier;

	if (!crtc_state->port_clock)

		crtc_state->port_clock = crtc_state->hw.adjusted_mode.crtc_clock

			* crtc_state->pixel_multiplier;



	ret = intel_crtc_compute_config(state, crtc);

	if (ret == -EDEADLK)
@@ -5768,11 +5768,11 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, 
	 * only enable it on 6bpc panels and when its not a compliance

	 * test requesting 6bpc video pattern.

	 */

	pipe_config->dither = (pipe_config->pipe_bpp == 6*3) &&

		!pipe_config->dither_force_disable;

	crtc_state->dither = (crtc_state->pipe_bpp == 6*3) &&

		!crtc_state->dither_force_disable;

	drm_dbg_kms(&i915->drm,

		    "hw max bpp: %i, pipe bpp: %i, dithering: %i\n",

		    base_bpp, pipe_config->pipe_bpp, pipe_config->dither);

		    base_bpp, crtc_state->pipe_bpp, crtc_state->dither);



	return 0;

}