Commit aac31903 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'i2c-for-6.18-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull more i2c updates from Wolfram Sang:

 - Second part of rtl9300 updates since dependencies are in now:
    - general cleanups
    - implement block read/write support
    - add RTL9310 support

 - DT schema conversion of hix5hd2 binding

 - namespace cleanup for i2c-algo-pca

 - minor simplification for mt65xx

* tag 'i2c-for-6.18-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  dt-bindings: i2c: hisilicon,hix5hd2: convert to DT schema
  i2c: mt65xx: convert set_speed function to void
  i2c: rename wait_for_completion callback to wait_for_completion_cb
  i2c: rtl9300: add support for RTL9310 I2C controller
  dt-bindings: i2c: realtek,rtl9301-i2c: extend for RTL9310 support
  i2c: rtl9300: use scoped guard instead of explicit lock/unlock
  i2c: rtl9300: separate xfer configuration and execution
  i2c: rtl9300: do not set read mode on every transfer
  i2c: rtl9300: move setting SCL frequency to config_io
  i2c: rtl9300: rename internal sda_pin to sda_num
  dt-bindings: i2c: realtek,rtl9301-i2c: fix wording and typos
  i2c: rtl9300: use regmap fields and API for registers
  i2c: rtl9300: Implement I2C block read and write
parents 0ae45244 eb4faf63
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+51 −0
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/hisilicon,hix5hd2-i2c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: I2C for HiSilicon hix5hd2 chipset platform

maintainers:
  - Wei Yan <sledge.yanwei@huawei.com>

allOf:
  - $ref: /schemas/i2c/i2c-controller.yaml#

properties:
  compatible:
    enum:
      - hisilicon,hix5hd2-i2c

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-frequency:
    description: Desired I2C bus frequency in Hz
    default: 100000

required:
  - compatible
  - reg
  - interrupts
  - clocks

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/hix5hd2-clock.h>

    i2c@f8b10000 {
        compatible = "hisilicon,hix5hd2-i2c";
        reg = <0xf8b10000 0x1000>;
        interrupts = <0 38 4>;
        clocks = <&clock HIX5HD2_I2C0_RST>;
        #address-cells = <1>;
        #size-cells = <0>;
    };
+0 −24
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I2C for Hisilicon hix5hd2 chipset platform

Required properties:
- compatible: Must be "hisilicon,hix5hd2-i2c"
- reg: physical base address of the controller and length of memory mapped
     region.
- interrupts: interrupt number to the cpu.
- #address-cells = <1>;
- #size-cells = <0>;
- clocks: phandles to input clocks.

Optional properties:
- clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000
- Child nodes conforming to i2c bus binding

Examples:
I2C0@f8b10000 {
	compatible = "hisilicon,hix5hd2-i2c";
	reg = <0xf8b10000 0x1000>;
	interrupts = <0 38 4>;
	clocks = <&clock HIX5HD2_I2C0_RST>;
	#address-cells = <1>;
	#size-cells = <0>;
}
+40 −5
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@@ -10,9 +10,11 @@ maintainers:
  - Chris Packham <chris.packham@alliedtelesis.co.nz>

description:
  The RTL9300 SoC has two I2C controllers. Each of these has an SCL line (which
  RTL9300 SoCs have two I2C controllers. Each of these has an SCL line (which
  if not-used for SCL can be a GPIO). There are 8 common SDA lines that can be
  assigned to either I2C controller.
  RTL9310 SoCs have equal capabilities but support 12 common SDA lines which
  can be assigned to either I2C controller.

properties:
  compatible:
@@ -23,11 +25,19 @@ properties:
              - realtek,rtl9302c-i2c
              - realtek,rtl9303-i2c
          - const: realtek,rtl9301-i2c
      - const: realtek,rtl9301-i2c
      - items:
          - enum:
              - realtek,rtl9311-i2c
              - realtek,rtl9312-i2c
              - realtek,rtl9313-i2c
          - const: realtek,rtl9310-i2c
      - enum:
          - realtek,rtl9301-i2c
          - realtek,rtl9310-i2c

  reg:
    items:
      - description: Register offset and size this I2C controller.
      - description: Register offset and size of this I2C controller.

  "#address-cells":
    const: 1
@@ -35,19 +45,44 @@ properties:
  "#size-cells":
    const: 0

  realtek,scl:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      The SCL line number of this I2C controller.
    enum: [ 0, 1 ]

patternProperties:
  '^i2c@[0-7]$':
  '^i2c@[0-9ab]$':
    $ref: /schemas/i2c/i2c-controller.yaml
    unevaluatedProperties: false

    properties:
      reg:
        description: The SDA pin associated with the I2C bus.
        description: The SDA line number associated with the I2C bus.
        maxItems: 1

    required:
      - reg


allOf:
  - if:
      properties:
        compatible:
          contains:
            const: realtek,rtl9310-i2c
    then:
      required:
        - realtek,scl
  - if:
      properties:
        compatible:
          contains:
            const: realtek,rtl9301-i2c
    then:
      patternProperties:
        '^i2c@[89ab]$': false

required:
  - compatible
  - reg
+1 −1
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@@ -30,7 +30,7 @@ static int i2c_debug;
#define pca_clock(adap) adap->i2c_clock
#define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
#define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
#define pca_wait(adap) adap->wait_for_completion(adap->data)
#define pca_wait(adap) adap->wait_for_completion_cb(adap->data)

static void pca_reset(struct i2c_algo_pca_data *adap)
{
+2 −9
Original line number Diff line number Diff line
@@ -868,7 +868,7 @@ static int mtk_i2c_calculate_speed(struct mtk_i2c *i2c, unsigned int clk_src,
	return 0;
}

static int mtk_i2c_set_speed(struct mtk_i2c *i2c, unsigned int parent_clk)
static void mtk_i2c_set_speed(struct mtk_i2c *i2c, unsigned int parent_clk)
{
	unsigned int clk_src;
	unsigned int step_cnt;
@@ -938,9 +938,6 @@ static int mtk_i2c_set_speed(struct mtk_i2c *i2c, unsigned int parent_clk)

		break;
	}


	return 0;
}

static void i2c_dump_register(struct mtk_i2c *i2c)
@@ -1460,11 +1457,7 @@ static int mtk_i2c_probe(struct platform_device *pdev)

	strscpy(i2c->adap.name, I2C_DRV_NAME, sizeof(i2c->adap.name));

	ret = mtk_i2c_set_speed(i2c, clk_get_rate(i2c->clocks[speed_clk].clk));
	if (ret) {
		dev_err(&pdev->dev, "Failed to set the speed.\n");
		return -EINVAL;
	}
	mtk_i2c_set_speed(i2c, clk_get_rate(i2c->clocks[speed_clk].clk));

	if (i2c->dev_comp->max_dma_support > 32) {
		ret = dma_set_mask(&pdev->dev,
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