Commit aac65685 authored Apr 09, 2026 by Bibo Mao Committed by Huacai Chen Apr 09, 2026

LoongArch: KVM: Move host CSR_GSTAT save and restore in context switch



CSR register LOONGARCH_CSR_GSTAT stores guest VMID information. With
existing implementation method, VMID is per vCPU, similar with ASID in
kernel. LOONGARCH_CSR_GSTAT is written at VM entry even if VMID is not
changed.

Here move LOONGARCH_CSR_GSTAT save/restore in vCPU context switch, and
update LOONGARCH_CSR_GSTAT only when VMID is updated at VM entry. At
most time VM enter/exit is much more frequent than vCPU thread context
switch.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>

parent f62eb9ca

arch/loongarch/kvm/main.c

+4 −4

Original line number	Diff line number	Diff line
		@@ -271,12 +271,12 @@ void kvm_check_vpid(struct kvm_vcpu *vcpu)
		* memory with new address is changed on other VCPUs.
		*/
		set_gcsr_llbctl(CSR_LLBCTL_WCLLB);
		}

		/* Restore GSTAT(0x50).vpid */
		vpid = (vcpu->arch.vpid & vpid_mask) << CSR_GSTAT_GID_SHIFT;
		change_csr_gstat(vpid_mask << CSR_GSTAT_GID_SHIFT, vpid);
		}
		}

		void kvm_init_vmcs(struct kvm *kvm)
		{

arch/loongarch/kvm/vcpu.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -1699,6 +1699,7 @@ static int _kvm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)

		/* Restore Root.GINTC from unused Guest.GINTC register */
		write_csr_gintc(csr->csrs[LOONGARCH_CSR_GINTC]);
		write_csr_gstat(csr->csrs[LOONGARCH_CSR_GSTAT]);

		/*
		* We should clear linked load bit to break interrupted atomics. This
		@@ -1794,6 +1795,7 @@ static int _kvm_vcpu_put(struct kvm_vcpu *vcpu, int cpu)
		kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ISR3);
		}

		csr->csrs[LOONGARCH_CSR_GSTAT] = read_csr_gstat();
		vcpu->arch.aux_inuse \|= KVM_LARCH_SWCSR_LATEST;

		out: